mirror/86Box
1
0
Fork 0
mirror of https://github.com/86Box/86Box.git synced 2026-02-23 01:48:21 -07:00
Code Issues Packages Projects Releases Activity

Merge remote-tracking branch 'origin/master' into c&t_69000

Browse Source
This commit is contained in:
Cacodemon345
2023-07-21 01:27:21 +06:00
parent 0d8071ff77 7d41b46c5e
commit ee7a2bba46
220 changed files with 13593 additions and 3923 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
.ci/build.sh
View File

@@ -24,8 +24,8 @@
# - For Windows (MSYS MinGW) builds:
# - Packaging requires 7-Zip on Program Files
# - Packaging the Ghostscript DLL requires 32-bit and/or 64-bit Ghostscript on Program Files
# - Packaging the FluidSynth DLL requires it to be at /home/86Box/dll32/libfluidsynth.dll
# and/or /home/86Box/dll64/libfluidsynth64.dll (for 32-bit and 64-bit builds respectively)
# - Packaging the XAudio2 DLL for FAudio requires it to be at /home/86Box/dll32/xaudio2*.dll
# and/or /home/86Box/dll64/xaudio2*.dll (for 32-bit and 64-bit builds respectively)
# - For Linux builds:
# - Only Debian and derivatives are supported
# - dpkg and apt-get are called through sudo to manage dependencies; make sure those
@@ -288,7 +288,6 @@ then
echo [-] Using MSYSTEM [$MSYSTEM]
# Install dependencies only if we're in a new build and/or architecture.
freetype_dll="$cache_dir/freetype.$MSYSTEM.dll"
if check_buildtag "$MSYSTEM"
then
# Update databases and keyring only if we're in a new build.
@@ -333,9 +332,6 @@ then
# Clean pacman cache when running under Jenkins to save disk space.
[ "$CI" = "true" ] && rm -rf /var/cache/pacman/pkg
# Generate a new freetype DLL for this architecture.
rm -f "$freetype_dll"
# Save build tag to skip this later. Doing it here (once everything is
# in place) is important to avoid potential issues with retried builds.
save_buildtag "$MSYSTEM"
@@ -595,7 +591,7 @@ else
# ...and the ones we do want listed. Non-dev packages fill missing spots on the list.
libpkgs=""
longest_libpkg=0
for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev
for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev libfluidsynth-dev
do
libpkgs="$libpkgs $pkg:$arch_deb"
length=$(echo -n $pkg | sed 's/-dev$//' | sed "s/qtdeclarative/qt/" | wc -c)
@@ -796,10 +792,6 @@ then
sevenzip="$pf/7-Zip/7z.exe"
[ "$arch" = "32" -a -d "/c/Program Files (x86)" ] && pf="/c/Program Files (x86)"
# Archive freetype from cache or generate it from local MSYS installation.
[ ! -e "$freetype_dll" ] && .ci/static2dll.sh -p freetype2 /$MSYSTEM/lib/libfreetype.a "$freetype_dll"
cp -p "$freetype_dll" archive_tmp/freetype.dll
# Archive Ghostscript DLL from local official distribution installation.
for gs in "$pf"/gs/gs*.*.*
do
@@ -810,8 +802,8 @@ then
"$sevenzip" e -y -o"archive_tmp" "$discord_zip" "lib/$arch_discord/discord_game_sdk.dll"
[ ! -e "archive_tmp/discord_game_sdk.dll" ] && echo [!] No Discord Game SDK for architecture [$arch_discord]
# Archive other DLLs from local directory.
cp -p "/home/$project/dll$arch/"* archive_tmp/
# Archive XAudio2 DLL if required.
grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt || cp -p "/home/$project/dll$arch/xaudio2"* archive_tmp/
# Archive executable, while also stripping it if requested.
if [ $strip -ne 0 ]
@@ -1003,6 +995,11 @@ else
ln -s "$relroot/usr/lib/libvulkan.so.1" "archive_tmp/usr/lib/libvulkan.so"
ln -s "$relroot/usr/lib/$libdir/libvulkan.so.1" "archive_tmp/usr/lib/$libdir/libvulkan.so"
# The FluidSynth packaged by Debian bullseye is ABI incompatible with
# the newer version we compile, despite sharing a major version. Since we
# don't run into the one breaking ABI change they made, just symlink it.
ln -s "$(readlink "archive_tmp/usr/lib/libfluidsynth.so.3")" "archive_tmp/usr/lib/libfluidsynth.so.2"
# Archive Discord Game SDK library.
7z e -y -o"archive_tmp/usr/lib" "$discord_zip" "lib/$arch_discord/discord_game_sdk.so"
[ ! -e "archive_tmp/usr/lib/discord_game_sdk.so" ] && echo [!] No Discord Game SDK for architecture [$arch_discord]

1
.ci/dependencies_macports.txt
View File

@@ -13,4 +13,5 @@ qt5
wget
fluidsynth
ghostscript
libslirp
vde2

1
.ci/dependencies_msys.txt
View File

@@ -8,5 +8,6 @@ SDL2
zlib
libpng
rtmidi
libslirp
qt5-static
qt5-translations

160
.ci/static2dll.sh
View File

@@ -1,160 +0,0 @@
#!/bin/sh
#
# 86Box A hypervisor and IBM PC system emulator that specializes in
# running old operating systems and software designed for IBM
# PC systems and compatibles from 1981 through fairly recent
# system designs based on the PCI bus.
#
# This file is part of the 86Box distribution.
#
# Script for converting MinGW static libraries into a DLL.
#
#
# Authors: RichardG, <richardg867@gmail.com>
#
# Copyright 2021 RichardG.
#
def_file="static2dll.def"
seen_file="static2dll.seen"
libs_file="static2dll.libs"
find_lib() {
# Try to find a static library's file.
local msystem_lib="/$(echo $MSYSTEM | tr '[:upper:]' '[:lower:]')/lib/lib"
if [ -e "$msystem_lib$1.a" ]
then
echo "$msystem_lib$1.a"
elif [ -e "$msystem_lib$1.dll.a" ]
then
echo "$msystem_lib$1.dll.a"
else
# Return dynamic reference to the library.
echo "-l$1"
return 1
fi
}
add_lib() {
# Always make sure this lib is listed after the last lib that depends on it.
old_libs=$(cat "$libs_file")
rm -f "$libs_file"
for lib in $old_libs
do
[ "$lib" != "$*" ] && echo "$lib" >> "$libs_file"
done
echo "$*" >> "$libs_file"
# Add libstdc++ in the end if required.
if echo "$*" | grep -q "/"
then
grep -Eq -- "__cxa_|__gxx_" "$1" 2> /dev/null && add_lib -static -lstdc++
fi
# Add libiconv for libintl.
if echo "$*" | grep -q "libintl"
then
add_lib $(find_lib iconv)
fi
# Add libuuid for glib.
if echo "$*" | grep -q "libglib"
then
add_lib $(find_lib uuid)
fi
}
run_pkgconfig() {
local cache_file="static2dll.$1.cache"
if [ -e "$cache_file" ]
then
cat "$cache_file"
else
pkg-config --static --libs "$1" 2> /dev/null | tee "$cache_file"
fi
}
parse_pkgconfig() {
# Parse arguments.
local layers=$1
shift
local input_lib_name=$1
shift
# Don't process the same file again.
grep -q '^'$input_lib_name'$' "$seen_file" && return
echo $input_lib_name >> "$seen_file"
echo "$layers" parse_pkgconfig $input_lib_name
# Parse pkg-config arguments.
for arg in $*
do
local arg_base="$(echo $arg | cut -c1-2)"
if [ "x$arg_base" = "x-l" ]
then
# Don't process the same lib again.
local lib_name="$(echo $arg | cut -c3-)"
[ "x$lib_name" == "x$input_lib_name" ] && continue
# Add lib path.
add_lib "$(find_lib $lib_name)"
# Get this lib's dependencies through pkg-config.
local pkgconfig="$(run_pkgconfig "$lib_name")"
[ $? -eq 0 ] && parse_pkgconfig "$layers"'>' "$lib_name" $pkgconfig || echo $lib_name >> "$seen_file"
elif [ "x$(echo $arg_base | cut -c1)" = "x-" ]
then
# Ignore other arguments.
continue
else
# Add lib path.
add_lib "$arg"
fi
done
}
# Parse arguments.
case $1 in
-p) # -p pkg_config_name static_lib_path out_dll
shift
base_pkgconfig=$(run_pkgconfig "$1")
base_path="$2"
base_name="$1"
;;
*) # pc_path static_lib_path out_dll
base_pkgconfig="$(grep ^Libs.private: $1 | cut -d: -f2-)"
base_path="$2"
base_name="$2"
;;
esac
# Check arguments.
if [ -z "$base_pkgconfig" -o -z "$base_path" -o -z "$base_name" ]
then
echo Usage:
echo static2dll.sh -p {pkgconfig_package_name} {static_lib_path} {out_dll_name}
echo static2dll.sh {pc_file_path} {static_lib_path} {out_dll_name}
exit 1
fi
# Produce .def file.
echo LIBRARY $(basename "$3") > "$def_file"
echo EXPORTS >> "$def_file"
nm "$base_path" | grep " [TC] " | sed "/ _/s// /" | awk '{ print $3 }' >> "$def_file"
# Parse dependencies recursively.
rm -f "$seen_file" "$libs_file" "$libs_file.tmp"
touch "$seen_file" "$libs_file"
parse_pkgconfig '>' $base_name $base_pkgconfig
# Produce final DLL.
dllwrap --def "$def_file" -o "$3" -Wl,--allow-multiple-definition "$base_path" $(cat "$libs_file")
status=$?
[ $status -eq 0 ] && rm -f "$def_file" "$seen_file" "$libs_file" "static2dll.*.cache"
# Update final DLL timestamp.
touch -r "$base_path" "$3"
exit $status

2
.github/workflows/c-cpp.yml vendored
View File

@@ -90,6 +90,8 @@ jobs:
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
- name: Checkout repository

5
.github/workflows/cmake.yml vendored
View File

@@ -104,6 +104,8 @@ jobs:
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
${{ matrix.ui.packages }}
@@ -328,6 +330,8 @@ jobs:
libc6-dev
librtmidi-dev
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvncserver-dev
${{ matrix.ui.packages }}
@@ -413,6 +417,7 @@ jobs:
libpng
rtmidi
openal-soft
fluidsynth
libvncserver
${{ matrix.ui.packages }}

5
.github/workflows/codeql.yml vendored
View File

@@ -107,6 +107,8 @@ jobs:
libpng:p
openal:p
rtmidi:p
libslirp:p
fluidsynth:p
libvncserver:p
${{ matrix.ui.packages }}
@@ -191,6 +193,8 @@ jobs:
libc6-dev
librtmidi-dev
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvncserver-dev
${{ matrix.ui.packages }}
@@ -266,6 +270,7 @@ jobs:
libpng
rtmidi
openal-soft
fluidsynth
libvncserver
${{ matrix.ui.packages }}

7
src/86box.c
View File

@@ -1275,7 +1275,9 @@ pc_run(void)
#ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */
// if (gdbstub_step == GDBSTUB_EXEC)
#endif
// mouse_process();
#if 0
mouse_process();
#endif
joystick_process();
endblit();
@@ -1416,6 +1418,9 @@ set_screen_size_monitor(int x, int y, int monitor_index)
monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 3);
monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 3);
break;
default:
break;
}
plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index);

235
src/acpi.c
View File

@@ -169,9 +169,9 @@ acpi_raise_smi(void *priv, int do_smi)
}
static uint32_t
acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
acpi_reg_read_common_regs(UNUSED(int size), uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -211,6 +211,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
update_tsc();
#endif
break;
default:
break;
}
#ifdef ENABLE_ACPI_LOG
@@ -221,9 +224,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_ali(int size, uint16_t addr, void *p)
acpi_reg_read_ali(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -277,7 +280,7 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
ret = dev->regs.pmcntrl;
break;
default:
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
break;
}
@@ -289,9 +292,9 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_intel(int size, uint16_t addr, void *p)
acpi_reg_read_intel(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -374,7 +377,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
ret = dev->regs.gporeg[addr & 3];
break;
default:
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
break;
}
@@ -386,9 +389,9 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_via_common(int size, uint16_t addr, void *p)
acpi_reg_read_via_common(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -470,7 +473,7 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
ret = (dev->regs.gptren >> shift32) & 0xff;
break;
default:
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
break;
}
@@ -482,9 +485,9 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_via(int size, uint16_t addr, void *p)
acpi_reg_read_via(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
@@ -527,7 +530,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
ret = (dev->regs.gpi_val >> shift16) & 0xff;
break;
default:
ret = acpi_reg_read_via_common(size, addr, p);
ret = acpi_reg_read_via_common(size, addr, priv);
break;
}
@@ -539,9 +542,9 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
acpi_reg_read_via_596b(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -577,7 +580,7 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
ret = (dev->regs.gpo_val >> shift32) & 0xff;
break;
default:
ret = acpi_reg_read_via_common(size, addr, p);
ret = acpi_reg_read_via_common(size, addr, priv);
break;
}
@@ -589,13 +592,13 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_smc(int size, uint16_t addr, void *p)
acpi_reg_read_smc(int size, uint16_t addr, void *priv)
{
uint32_t ret = 0x00000000;
addr &= 0x0f;
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
@@ -605,9 +608,9 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
acpi_aux_reg_read_smc(UNUSED(int size), uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
@@ -638,6 +641,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
/* Miscellaneous Control Register */
ret = dev->regs.glbctl & 0xff;
break;
default:
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
@@ -645,9 +651,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
}
static void
acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int sus_typ;
@@ -719,13 +725,16 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
}
dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */;
break;
default:
break;
}
}
static void
acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -782,7 +791,7 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.pmcntrl = val & 1;
break;
default:
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.gpcntrl &= ~0x0002;
@@ -795,9 +804,9 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
}
static void
acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -878,7 +887,7 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gporeg[addr & 3] = val;
break;
default:
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.glbctl &= ~0x0002;
@@ -892,9 +901,9 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
}
static void
acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -965,7 +974,7 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9;
break;
default:
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.glbctl &= ~0x0002;
@@ -986,9 +995,9 @@ acpi_i2c_set(acpi_t *dev)
}
static void
acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -1044,15 +1053,15 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff;
break;
default:
acpi_reg_write_via_common(size, addr, val, p);
acpi_reg_write_via_common(size, addr, val, priv);
break;
}
}
static void
acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -1102,20 +1111,20 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff;
break;
default:
acpi_reg_write_via_common(size, addr, val, p);
acpi_reg_write_via_common(size, addr, val, priv);
break;
}
}
static void
acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
addr &= 0x0f;
acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.glbctl &= ~0x0001;
@@ -1127,9 +1136,9 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
}
static void
acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
acpi_aux_reg_write_smc(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
addr &= 0x07;
@@ -1171,76 +1180,79 @@ acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
acpi_update_irq(dev);
}
break;
default:
break;
}
}
static uint32_t
acpi_reg_read_common(int size, uint16_t addr, void *p)
acpi_reg_read_common(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint8_t ret = 0xff;
if (dev->vendor == VEN_ALI)
ret = acpi_reg_read_ali(size, addr, p);
ret = acpi_reg_read_ali(size, addr, priv);
else if (dev->vendor == VEN_VIA)
ret = acpi_reg_read_via(size, addr, p);
ret = acpi_reg_read_via(size, addr, priv);
else if (dev->vendor == VEN_VIA_596B)
ret = acpi_reg_read_via_596b(size, addr, p);
ret = acpi_reg_read_via_596b(size, addr, priv);
else if (dev->vendor == VEN_INTEL)
ret = acpi_reg_read_intel(size, addr, p);
ret = acpi_reg_read_intel(size, addr, priv);
else if (dev->vendor == VEN_SMC)
ret = acpi_reg_read_smc(size, addr, p);
ret = acpi_reg_read_smc(size, addr, priv);
return ret;
}
static void
acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
if (dev->vendor == VEN_ALI)
acpi_reg_write_ali(size, addr, val, p);
acpi_reg_write_ali(size, addr, val, priv);
else if (dev->vendor == VEN_VIA)
acpi_reg_write_via(size, addr, val, p);
acpi_reg_write_via(size, addr, val, priv);
else if (dev->vendor == VEN_VIA_596B)
acpi_reg_write_via_596b(size, addr, val, p);
acpi_reg_write_via_596b(size, addr, val, priv);
else if (dev->vendor == VEN_INTEL)
acpi_reg_write_intel(size, addr, val, p);
acpi_reg_write_intel(size, addr, val, priv);
else if (dev->vendor == VEN_SMC)
acpi_reg_write_smc(size, addr, val, p);
acpi_reg_write_smc(size, addr, val, priv);
}
static uint32_t
acpi_aux_reg_read_common(int size, uint16_t addr, void *p)
acpi_aux_reg_read_common(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint8_t ret = 0xff;
if (dev->vendor == VEN_SMC)
ret = acpi_aux_reg_read_smc(size, addr, p);
ret = acpi_aux_reg_read_smc(size, addr, priv);
return ret;
}
static void
acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p)
acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
if (dev->vendor == VEN_SMC)
acpi_aux_reg_write_smc(size, addr, val, p);
acpi_aux_reg_write_smc(size, addr, val, priv);
}
static uint32_t
acpi_reg_readl(uint16_t addr, void *p)
acpi_reg_readl(uint16_t addr, void *priv)
{
uint32_t ret = 0x00000000;
ret = acpi_reg_read_common(4, addr, p);
ret |= (acpi_reg_read_common(4, addr + 1, p) << 8);
ret |= (acpi_reg_read_common(4, addr + 2, p) << 16);
ret |= (acpi_reg_read_common(4, addr + 3, p) << 24);
ret = acpi_reg_read_common(4, addr, priv);
ret |= (acpi_reg_read_common(4, addr + 1, priv) << 8);
ret |= (acpi_reg_read_common(4, addr + 2, priv) << 16);
ret |= (acpi_reg_read_common(4, addr + 3, priv) << 24);
acpi_log("ACPI: Read L %08X from %04X\n", ret, addr);
@@ -1248,12 +1260,12 @@ acpi_reg_readl(uint16_t addr, void *p)
}
static uint16_t
acpi_reg_readw(uint16_t addr, void *p)
acpi_reg_readw(uint16_t addr, void *priv)
{
uint16_t ret = 0x0000;
ret = acpi_reg_read_common(2, addr, p);
ret |= (acpi_reg_read_common(2, addr + 1, p) << 8);
ret = acpi_reg_read_common(2, addr, priv);
ret |= (acpi_reg_read_common(2, addr + 1, priv) << 8);
acpi_log("ACPI: Read W %08X from %04X\n", ret, addr);
@@ -1261,11 +1273,11 @@ acpi_reg_readw(uint16_t addr, void *p)
}
static uint8_t
acpi_reg_read(uint16_t addr, void *p)
acpi_reg_read(uint16_t addr, void *priv)
{
uint8_t ret = 0x00;
ret = acpi_reg_read_common(1, addr, p);
ret = acpi_reg_read_common(1, addr, priv);
acpi_log("ACPI: Read B %02X from %04X\n", ret, addr);
@@ -1273,14 +1285,14 @@ acpi_reg_read(uint16_t addr, void *p)
}
static uint32_t
acpi_aux_reg_readl(uint16_t addr, void *p)
acpi_aux_reg_readl(uint16_t addr, void *priv)
{
uint32_t ret = 0x00000000;
ret = acpi_aux_reg_read_common(4, addr, p);
ret |= (acpi_aux_reg_read_common(4, addr + 1, p) << 8);
ret |= (acpi_aux_reg_read_common(4, addr + 2, p) << 16);
ret |= (acpi_aux_reg_read_common(4, addr + 3, p) << 24);
ret = acpi_aux_reg_read_common(4, addr, priv);
ret |= (acpi_aux_reg_read_common(4, addr + 1, priv) << 8);
ret |= (acpi_aux_reg_read_common(4, addr + 2, priv) << 16);
ret |= (acpi_aux_reg_read_common(4, addr + 3, priv) << 24);
acpi_log("ACPI: Read Aux L %08X from %04X\n", ret, addr);
@@ -1288,12 +1300,12 @@ acpi_aux_reg_readl(uint16_t addr, void *p)
}
static uint16_t
acpi_aux_reg_readw(uint16_t addr, void *p)
acpi_aux_reg_readw(uint16_t addr, void *priv)
{
uint16_t ret = 0x0000;
ret = acpi_aux_reg_read_common(2, addr, p);
ret |= (acpi_aux_reg_read_common(2, addr + 1, p) << 8);
ret = acpi_aux_reg_read_common(2, addr, priv);
ret |= (acpi_aux_reg_read_common(2, addr + 1, priv) << 8);
acpi_log("ACPI: Read Aux W %04X from %04X\n", ret, addr);
@@ -1301,11 +1313,11 @@ acpi_aux_reg_readw(uint16_t addr, void *p)
}
static uint8_t
acpi_aux_reg_read(uint16_t addr, void *p)
acpi_aux_reg_read(uint16_t addr, void *priv)
{
uint8_t ret = 0x00;
ret = acpi_aux_reg_read_common(1, addr, p);
ret = acpi_aux_reg_read_common(1, addr, priv);
acpi_log("ACPI: Read Aux B %02X from %04X\n", ret, addr);
@@ -1313,59 +1325,59 @@ acpi_aux_reg_read(uint16_t addr, void *p)
}
static void
acpi_reg_writel(uint16_t addr, uint32_t val, void *p)
acpi_reg_writel(uint16_t addr, uint32_t val, void *priv)
{
acpi_log("ACPI: Write L %08X to %04X\n", val, addr);
acpi_reg_write_common(4, addr, val & 0xff, p);
acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p);
acpi_reg_write_common(4, addr, val & 0xff, priv);
acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv);
acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv);
acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv);
}
static void
acpi_reg_writew(uint16_t addr, uint16_t val, void *p)
acpi_reg_writew(uint16_t addr, uint16_t val, void *priv)
{
acpi_log("ACPI: Write W %04X to %04X\n", val, addr);
acpi_reg_write_common(2, addr, val & 0xff, p);
acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
acpi_reg_write_common(2, addr, val & 0xff, priv);
acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv);
}
static void
acpi_reg_write(uint16_t addr, uint8_t val, void *p)
acpi_reg_write(uint16_t addr, uint8_t val, void *priv)
{
acpi_log("ACPI: Write B %02X to %04X\n", val, addr);
acpi_reg_write_common(1, addr, val, p);
acpi_reg_write_common(1, addr, val, priv);
}
static void
acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p)
acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *priv)
{
acpi_log("ACPI: Write Aux L %08X to %04X\n", val, addr);
acpi_aux_reg_write_common(4, addr, val & 0xff, p);
acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p);
acpi_aux_reg_write_common(4, addr, val & 0xff, priv);
acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv);
acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv);
acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv);
}
static void
acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p)
acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *priv)
{
acpi_log("ACPI: Write Aux W %04X to %04X\n", val, addr);
acpi_aux_reg_write_common(2, addr, val & 0xff, p);
acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
acpi_aux_reg_write_common(2, addr, val & 0xff, priv);
acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv);
}
static void
acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p)
acpi_aux_reg_write(uint16_t addr, uint8_t val, void *priv)
{
acpi_log("ACPI: Write Aux B %02X to %04X\n", val, addr);
acpi_aux_reg_write_common(1, addr, val, p);
acpi_aux_reg_write_common(1, addr, val, priv);
}
void
@@ -1374,9 +1386,9 @@ acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en)
int size;
switch (dev->vendor) {
default:
case VEN_ALI:
case VEN_INTEL:
default:
size = 0x040;
break;
case VEN_SMC:
@@ -1545,9 +1557,9 @@ acpi_pwrbtn_timer(void *priv)
}
static void
acpi_apm_out(uint16_t port, uint8_t val, void *p)
acpi_apm_out(uint16_t port, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
acpi_log("[%04X:%08X] APM write: %04X = %02X (AX = %04X, BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, AX, BX, CX);
@@ -1557,7 +1569,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p)
if (port == 0x0001) {
acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi);
dev->apm->cmd = val;
// acpi_raise_smi(dev, dev->apm->do_smi);
#if 0
acpi_raise_smi(dev, dev->apm->do_smi);
#endif
if (dev->apm->do_smi)
smi_raise();
dev->regs.ali_soft_smi = 1;
@@ -1575,9 +1589,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p)
}
static uint8_t
acpi_apm_in(uint16_t port, void *p)
acpi_apm_in(uint16_t port, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint8_t ret = 0xff;
port &= 0x0001;
@@ -1731,6 +1745,9 @@ acpi_init(const device_t *info)
dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE;
dev->suspend_types[4] = SUS_SUSPEND;
break;
default:
break;
}
timer_add(&dev->timer, acpi_timer_overflow, dev, 0);

16
src/apm.c
View File

@@ -52,9 +52,9 @@ apm_set_do_smi(apm_t *dev, uint8_t do_smi)
}
static void
apm_out(uint16_t port, uint8_t val, void *p)
apm_out(uint16_t port, uint8_t val, void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
apm_log("[%04X:%08X] APM write: %04X = %02X (BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, BX, CX);
@@ -69,9 +69,9 @@ apm_out(uint16_t port, uint8_t val, void *p)
}
static uint8_t
apm_in(uint16_t port, void *p)
apm_in(uint16_t port, void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
uint8_t ret = 0xff;
port &= 0x0001;
@@ -87,17 +87,17 @@ apm_in(uint16_t port, void *p)
}
static void
apm_reset(void *p)
apm_reset(void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
dev->cmd = dev->stat = 0x00;
}
static void
apm_close(void *p)
apm_close(void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
free(dev);
}

35
src/chipset/intel_420ex.c
View File

@@ -41,6 +41,9 @@
#include <86box/machine.h>
#include <86box/chipset.h>
#include <86box/spd.h>
#ifndef USE_DRB_HACK
#include <86box/row.h>
#endif
#define MEM_STATE_SHADOW_R 0x01
#define MEM_STATE_SHADOW_W 0x02
@@ -158,6 +161,26 @@ i420ex_smram_handler_phase1(i420ex_t *dev)
(regs[0x70] & 0x70) == 0x40, !(regs[0x70] & 0x20));
}
#ifndef USE_DRB_HACK
static void
i420ex_drb_recalc(i420ex_t *dev)
{
int i;
uint32_t boundary;
for (i = 4; i >= 0; i--)
row_disable(i);
for (i = 0; i <= 4; i++) {
boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
row_set_boundary(i, boundary);
}
flushmmucache();
}
#endif
static void
i420ex_write(int func, int addr, uint8_t val, void *priv)
{
@@ -289,7 +312,12 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
case 0x62:
case 0x63:
case 0x64:
#ifdef USE_DRB_HACK
spd_write_drbs(dev->regs, 0x60, 0x64, 1);
#else
dev->regs[addr] = val;
i420ex_drb_recalc(dev);
#endif
break;
case 0x66:
case 0x67:
@@ -452,7 +480,7 @@ i420ex_reset(void *priv)
i420ex_write(0, 0x59 + i, 0x00, priv);
for (uint8_t i = 0; i <= 4; i++)
i420ex_write(0, 0x60 + i, 0x01, priv);
dev->regs[0x60 + i] = 0x01;
dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */
dev->smram_locked = 0;
@@ -530,6 +558,11 @@ i420ex_init(const device_t *info)
device_add(&ide_pci_2ch_device);
#ifndef USE_DRB_HACK
row_device.local = 4 | (1 << 8) | (0x01 << 16) | (8 << 24);
device_add((const device_t *) &row_device);
#endif
i420ex_reset_hard(dev);
return dev;

9
src/chipset/intel_4x0.c
View File

@@ -1537,7 +1537,12 @@ i4x0_reset(void *priv)
i4x0_write(0, 0x5a + i, 0x00, priv);
for (uint8_t i = 0; i <= dev->max_drb; i++)
i4x0_write(0, 0x60 + i, dev->drb_default, priv);
dev->regs[0x60 + i] = dev->drb_default;
if (dev->type >= INTEL_430NX) {
for (uint8_t i = 0; i < 4; i++)
dev->regs[0x68 + i] = 0x00;
}
if (dev->type >= INTEL_430FX) {
dev->regs[0x72] &= 0xef; /* Forcibly unlock the SMRAM register. */
@@ -1621,7 +1626,7 @@ i4x0_init(const device_t *info)
regs[0x59] = 0x0f;
regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02;
dev->max_drb = 3;
dev->drb_unit = 4;
dev->drb_unit = 1;
dev->drb_default = 0x02;
break;
case INTEL_430LX:

9
src/chipset/intel_i450kx.c
View File

@@ -326,13 +326,6 @@ pb_write(int func, int addr, uint8_t val, void *priv)
dev->pb_pci_conf[addr] = val & /*0x1a*/ 0x1f;
break;
case 0xb4:
dev->pb_pci_conf[addr] = val & 0xe0;
break;
case 0xb5:
dev->pb_pci_conf[addr] = val & 0x1f;
break;
case 0xb8:
case 0xb9:
dev->pb_pci_conf[addr] = val;
@@ -689,7 +682,7 @@ i450kx_reset(void *priv)
dev->pb_pci_conf[0xb0] = 0x00;
dev->pb_pci_conf[0xb1] = 0x00;
#endif
dev->pb_pci_conf[0xb4] = 0x00;
dev->pb_pci_conf[0xb4] = 0xff;
dev->pb_pci_conf[0xb5] = 0x00;
dev->pb_pci_conf[0xb8] = 0x05;
dev->pb_pci_conf[0xb9] = 0x00;

42
src/chipset/sis_85c496.c
View File

@@ -38,10 +38,17 @@
#include <86box/machine.h>
#include <86box/chipset.h>
#include <86box/spd.h>
#ifndef USE_DRB_HACK
#include <86box/row.h>
#endif
typedef struct sis_85c496_t {
uint8_t cur_reg;
uint8_t rmsmiblk_count;
#ifndef USE_DRB_HACK
uint8_t drb_default;
uint8_t drb_bits;
#endif
uint8_t regs[127];
uint8_t pci_conf[256];
smram_t *smram;
@@ -184,6 +191,26 @@ sis_85c496_ide_handler(sis_85c496_t *dev)
}
}
#ifndef USE_DRB_HACK
static void
sis_85c496_drb_recalc(sis_85c496_t *dev)
{
int i;
uint32_t boundary;
for (i = 7; i >= 0; i--)
row_disable(i);
for (i = 0; i <= 7; i++) {
boundary = ((uint32_t) dev->pci_conf[0x48 + i]);
row_set_boundary(i, boundary);
}
flushmmucache();
}
#endif
/* 00 - 3F = PCI Configuration, 40 - 7F = 85C496, 80 - FF = 85C497 */
static void
sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
@@ -259,10 +286,12 @@ sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
case 0x4d:
case 0x4e:
case 0x4f:
#if 0
dev->pci_conf[addr] = val;
#endif
#ifdef USE_DRB_HACK
spd_write_drbs(dev->pci_conf, 0x48, 0x4f, 1);
#else
dev->pci_conf[addr] = val;
sis_85c496_drb_recalc(dev);
#endif
break;
case 0x50:
case 0x51: /* Exclusive Area 0 Setup */
@@ -552,7 +581,7 @@ sis_85c496_reset(void *priv)
// sis_85c49x_pci_write(0, 0x5a, 0x06, dev);
for (uint8_t i = 0; i < 8; i++)
sis_85c49x_pci_write(0, 0x48 + i, 0x00, dev);
dev->pci_conf[0x48 + i] = 0x02;
sis_85c49x_pci_write(0, 0x80, 0x00, dev);
sis_85c49x_pci_write(0, 0x81, 0x00, dev);
@@ -643,6 +672,11 @@ static void
timer_add(&dev->rmsmiblk_timer, sis_85c496_rmsmiblk_count, dev, 0);
#ifndef USE_DRB_HACK
row_device.local = 7 | (1 << 8) | (0x02 << 16) | (7 << 24);
device_add((const device_t *) &row_device);
#endif
sis_85c496_reset(dev);
return dev;

6
src/chipset/vl82c480.c
View File

@@ -121,10 +121,13 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv)
}
break;
/* TODO: This is actually Fast A20 disable. */
#if 0
case 0xee:
if (mem_a20_alt)
outb(0x92, inb(0x92) & ~2);
break;
#endif
default:
break;
@@ -146,10 +149,13 @@ vl82c480_read(uint16_t addr, void *priv)
ret = dev->regs[dev->idx];
break;
/* TODO: This is actually Fast A20 enable. */
#if 0
case 0xee:
if (!mem_a20_alt)
outb(0x92, inb(0x92) | 2);
break;
#endif
case 0xef:
softresetx86();

48
src/codegen/codegen_ops.c
View File

@@ -128,6 +128,54 @@ RecompOpFn recomp_opcodes_0f[512] = {
// clang-format on
};
RecompOpFn recomp_opcodes_0f_no_mmx[512] = {
// clang-format off
/*16-bit data*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*80*/ ropJO_w, ropJNO_w, ropJB_w, ropJNB_w, ropJE_w, ropJNE_w, ropJBE_w, ropJNBE_w, ropJS_w, ropJNS_w, ropJP_w, ropJNP_w, ropJL_w, ropJNL_w, ropJLE_w, ropJNLE_w,
/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*a0*/ ropPUSH_FS_16, ropPOP_FS_16, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_GS_16, ropPOP_GS_16, NULL, NULL, NULL, NULL, NULL, NULL,
/*b0*/ NULL, NULL, ropLSS, NULL, ropLFS, ropLGS, ropMOVZX_w_b, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_w_b, NULL,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*80*/ ropJO_l, ropJNO_l, ropJB_l, ropJNB_l, ropJE_l, ropJNE_l, ropJBE_l, ropJNBE_l, ropJS_l, ropJNS_l, ropJP_l, ropJNP_l, ropJL_l, ropJNL_l, ropJLE_l, ropJNLE_l,
/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*a0*/ ropPUSH_FS_32, ropPOP_FS_32, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_GS_32, ropPOP_GS_32, NULL, NULL, NULL, NULL, NULL, NULL,
/*b0*/ NULL, NULL, ropLSS, NULL, ropLFS, ropLGS, ropMOVZX_l_b, ropMOVZX_l_w, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_l_b, ropMOVSX_l_w,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
// clang-format on
};
RecompOpFn recomp_opcodes_d8[512] = {
// clang-format off
/*16-bit data*/

1
src/codegen/codegen_ops.h
View File

@@ -7,6 +7,7 @@ typedef uint32_t (*RecompOpFn)(uint8_t opcode, uint32_t fetchdat, uint32_t op_32
extern RecompOpFn recomp_opcodes[512];
extern RecompOpFn recomp_opcodes_0f[512];
extern RecompOpFn recomp_opcodes_0f_no_mmx[512];
extern RecompOpFn recomp_opcodes_d8[512];
extern RecompOpFn recomp_opcodes_d9[512];
extern RecompOpFn recomp_opcodes_da[512];

2
src/codegen/codegen_x86-64.c
View File

@@ -845,7 +845,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
switch (opcode) {
case 0x0f:
op_table = x86_dynarec_opcodes_0f;
recomp_op_table = recomp_opcodes_0f;
recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
over = 1;
break;

2
src/codegen/codegen_x86.c
View File

@@ -1884,7 +1884,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
switch (opcode) {
case 0x0f:
op_table = x86_dynarec_opcodes_0f;
recomp_op_table = recomp_opcodes_0f;
recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
over = 1;
break;

6
src/codegen_new/codegen.c
View File

@@ -399,7 +399,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
last_prefix = 0x0f;
#endif
op_table = x86_dynarec_opcodes_0f;
recomp_op_table = recomp_opcodes_0f;
recomp_op_table = fpu_softfloat ? recomp_opcodes_0f_no_mmx : recomp_opcodes_0f;
over = 1;
break;
@@ -634,11 +634,11 @@ generate_call:
}
opcode_3dnow = fastreadb(cs + opcode_pc);
if (recomp_opcodes_3DNOW[opcode_3dnow]) {
if (!fpu_softfloat && recomp_opcodes_3DNOW[opcode_3dnow]) {
next_pc = opcode_pc + 1;
op_table = (OpFn *) x86_dynarec_opcodes_3DNOW;
recomp_op_table = recomp_opcodes_3DNOW;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_3DNOW;
opcode = opcode_3dnow;
recomp_opcode_mask = 0xff;
opcode_mask = 0xff;

48
src/codegen_new/codegen_ops.c
View File

@@ -144,6 +144,54 @@ RecompOpFn recomp_opcodes_0f[512] = {
// clang-format on
};
RecompOpFn recomp_opcodes_0f_no_mmx[512] = {
// clang-format off
/*16-bit data*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*80*/ ropJO_16, ropJNO_16, ropJB_16, ropJNB_16, ropJE_16, ropJNE_16, ropJBE_16, ropJNBE_16, ropJS_16, ropJNS_16, ropJP_16, ropJNP_16, ropJL_16, ropJNL_16, ropJLE_16, ropJNLE_16,
/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*a0*/ ropPUSH_FS_16, ropPOP_FS_16, NULL, NULL, ropSHLD_16_imm, NULL, NULL, NULL, ropPUSH_GS_16, ropPOP_GS_16, NULL, NULL, ropSHRD_16_imm, NULL, NULL, NULL,
/*b0*/ NULL, NULL, ropLSS_16, NULL, ropLFS_16, ropLGS_16, ropMOVZX_16_8, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_16_8, NULL,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*80*/ ropJO_32, ropJNO_32, ropJB_32, ropJNB_32, ropJE_32, ropJNE_32, ropJBE_32, ropJNBE_32, ropJS_32, ropJNS_32, ropJP_32, ropJNP_32, ropJL_32, ropJNL_32, ropJLE_32, ropJNLE_32,
/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*a0*/ ropPUSH_FS_32, ropPOP_FS_32, NULL, NULL, ropSHLD_32_imm, NULL, NULL, NULL, ropPUSH_GS_32, ropPOP_GS_32, NULL, NULL, ropSHRD_32_imm, NULL, NULL, NULL,
/*b0*/ NULL, NULL, ropLSS_32, NULL, ropLFS_32, ropLGS_32, ropMOVZX_32_8, ropMOVZX_32_16, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_32_8, ropMOVSX_32_16,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
// clang-format on
};
RecompOpFn recomp_opcodes_3DNOW[256] = {
// clang-format off
#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM || defined __aarch64__ || defined _M_ARM64

1
src/codegen_new/codegen_ops.h
View File

@@ -9,6 +9,7 @@ typedef uint32_t (*RecompOpFn)(codeblock_t *block, struct ir_data_t *ir, uint8_t
extern RecompOpFn recomp_opcodes[512];
extern RecompOpFn recomp_opcodes_0f[512];
extern RecompOpFn recomp_opcodes_0f_no_mmx[512];
extern RecompOpFn recomp_opcodes_3DNOW[256];
extern RecompOpFn recomp_opcodes_d8[512];
extern RecompOpFn recomp_opcodes_d9[512];

36
src/config.c
View File

@@ -515,13 +515,8 @@ load_machine(void)
cpu_use_dynarec = !!ini_section_get_int(cat, "cpu_use_dynarec", 0);
fpu_softfloat = !!ini_section_get_int(cat, "fpu_softfloat", 0);
/*The IBM PS/2 model 70 type 4 BIOS does heavy tests to the FPU in 80-bit precision mode, requiring softfloat
otherwise it would always throw error 12903 on POST, so always disable dynarec and enable softfloat for this
machine only.*/
if (!strcmp(machines[machine].internal_name, "ibmps2_m70_type4")) {
cpu_use_dynarec = 0;
if (machine_has_flags(machine, MACHINE_SOFTFLOAT_ONLY))
fpu_softfloat = 1;
}
p = ini_section_get_string(cat, "time_sync", NULL);
if (p != NULL) {
@@ -898,11 +893,11 @@ load_ports(void)
sprintf(temp, "serial%d_enabled", c + 1);
com_ports[c].enabled = !!ini_section_get_int(cat, temp, (c >= 2) ? 0 : 1);
/*
#if 0
sprintf(temp, "serial%d_device", c + 1);
p = (char *) ini_section_get_string(cat, temp, "none");
com_ports[c].device = com_device_get_from_internal_name(p);
*/
#endif
sprintf(temp, "serial%d_passthrough_enabled", c + 1);
serial_passthrough_enabled[c] = !!ini_section_get_int(cat, temp, 0);
@@ -1080,8 +1075,8 @@ load_hard_disks(void)
hdd[c].bus = hdd_string_to_bus(s, 0);
switch (hdd[c].bus) {
case HDD_BUS_DISABLED:
default:
case HDD_BUS_DISABLED:
max_spt = max_hpc = max_tracks = 0;
break;
@@ -1311,8 +1306,10 @@ load_floppy_drives(void)
else
strncpy(floppyfns[c], p, 511);
/* if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]); */
#if 0
if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]);
#endif
sprintf(temp, "fdd_%02i_writeprot", c + 1);
ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0);
ini_section_delete_var(cat, temp);
@@ -1377,8 +1374,10 @@ load_floppy_and_cdrom_drives(void)
else
strncpy(floppyfns[c], p, 511);
/* if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]); */
#if 0
if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]);
#endif
sprintf(temp, "fdd_%02i_writeprot", c + 1);
ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0);
sprintf(temp, "fdd_%02i_turbo", c + 1);
@@ -2533,6 +2532,9 @@ save_network(void)
case NET_TYPE_VDE:
ini_section_set_string(cat, temp, "vde");
break;
default:
break;
}
sprintf(temp, "net_%02i_host_device", c + 1);
@@ -2542,7 +2544,9 @@ save_network(void)
else
ini_section_set_string(cat, temp, net_cards_conf[c].host_dev_name);
} else {
/* ini_section_set_string(cat, temp, "none"); */
#if 0
ini_section_set_string(cat, temp, "none");
#endif
ini_section_delete_var(cat, temp);
}
@@ -2573,7 +2577,7 @@ save_ports(void)
else
ini_section_set_int(cat, temp, com_ports[c].enabled);
/*
#if 0
sprintf(temp, "serial%d_type", c + 1);
if (!com_ports[c].enabled))
ini_section_delete_var(cat, temp);
@@ -2586,7 +2590,7 @@ save_ports(void)
else
ini_section_set_string(cat, temp,
(char *) com_device_get_internal_name(com_ports[c].device));
*/
#endif
sprintf(temp, "serial%d_passthrough_enabled", c + 1);
if (serial_passthrough_enabled[c]) {

1231
src/cpu/808x.c
View File

File diff suppressed because it is too large Load Diff

16
src/cpu/808x/CMakeLists.txt Normal file
View File

@@ -0,0 +1,16 @@
#
# 86Box A hypervisor and IBM PC system emulator that specializes in
# running old operating systems and software designed for IBM
# PC systems and compatibles from 1981 through fairly recent
# system designs based on the PCI bus.
#
# This file is part of the 86Box distribution.
#
# CMake build script.
#
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
#
# Copyright 2020-2021 David Hrdlička.
#
add_library(808x OBJECT queue.c)

190
src/cpu/808x/queue.c Normal file
View File

@@ -0,0 +1,190 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* 808x CPU emulation, mostly ported from reenigne's XTCE, which
* is cycle-accurate.
*
* Authors: gloriouscow, <https://github.com/dbalsom>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2023 gloriouscow.
* Copyright 2023 Miran Grca.
*/
#include <math.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include "x86.h"
#include <86box/machine.h>
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/nmi.h>
#include <86box/pic.h>
#include <86box/ppi.h>
#include <86box/timer.h>
#include <86box/gdbstub.h>
// #include "808x.h"
#include "queue.h"
/* TODO: Move to cpu.h so this can eventually be reused for 286+ as well. */
#define QUEUE_MAX 6
typedef struct queue_t
{
size_t size;
size_t len;
size_t back;
size_t front;
uint8_t q[QUEUE_MAX];
uint16_t preload;
queue_delay_t delay;
} queue_t;
static queue_t queue;
#ifdef ENABLE_QUEUE_LOG
int queue_do_log = ENABLE_QUEUE_LOG;
static void
queue_log(const char *fmt, ...)
{
va_list ap;
if (queue_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define queue_log(fmt, ...)
#endif
void
queue_set_size(size_t size)
{
if (size > QUEUE_MAX)
fatal("Requested prefetch queue of %i bytes is too big\n", size);
queue.size = size;
}
size_t
queue_get_len(void)
{
return queue.len;
}
int
queue_is_full(void)
{
return (queue.len != queue.size);
}
uint16_t
queue_get_preload(void)
{
uint16_t ret = queue.preload;
queue.preload = 0x0000;
return ret;
}
int
queue_has_preload(void)
{
return (queue.preload & FLAG_PRELOADED) ? 1 : 0;
}
void
queue_set_preload(void)
{
uint8_t byte;
if (queue.len > 0) {
byte = queue_pop();
queue.preload = ((uint16_t) byte) | FLAG_PRELOADED;
} else
fatal("Tried to preload with empty queue\n");
}
void
queue_push8(uint8_t byte)
{
if (queue.len < queue.size) {
queue.q[queue.front] = byte;
queue.front = (queue.front + 1) % queue.size;
queue.len++;
if (queue.len == 3)
queue.delay = DELAY_WRITE;
else
queue.delay = DELAY_NONE;
} else
fatal("Queue overrun\n");
}
void
queue_push16(uint16_t word)
{
queue_push8((uint8_t) (word & 0xff));
queue_push8((uint8_t) ((word >> 8) & 0xff));
}
uint8_t
queue_pop(void)
{
uint8_t byte = 0xff;
if (queue.len > 0) {
byte = queue.q[queue.back];
queue.back = (queue.back + 1) % queue.size;
queue.len--;
if (queue.len >= 3)
queue.delay = DELAY_READ;
else
queue.delay = DELAY_NONE;
} else
fatal("Queue underrun\n");
return byte;
}
queue_delay_t
queue_get_delay(void)
{
return queue.delay;
}
void
queue_flush(void)
{
memset(&queue, 0x00, sizeof(queue_t));
queue.delay = DELAY_NONE;
}
void
queue_init(void)
{
queue_flush();
if (is8086)
queue_set_size(6);
else
queue_set_size(4);
}

43
src/cpu/808x/queue.h Normal file
View File

@@ -0,0 +1,43 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Prefetch queue implementation header.
*
* Authors: gloriouscow, <https://github.com/dbalsom>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2023 gloriouscow.
* Copyright 2023 Miran Grca.
*/
#ifndef EMU_QUEUE_H
#define EMU_QUEUE_H
typedef enum queue_delay_t
{
DELAY_READ,
DELAY_WRITE,
DELAY_NONE
} queue_delay_t;
#define FLAG_PRELOADED 0x8000
extern void queue_set_size(size_t size);
extern size_t queue_get_len(void);
extern int queue_is_full(void);
extern uint16_t queue_get_preload(void);
extern int queue_has_preload(void);
extern void queue_set_preload(void);
extern void queue_push8(uint8_t byte);
extern void queue_push16(uint16_t word);
extern uint8_t queue_pop(void);
extern queue_delay_t queue_get_delay(void);
extern void queue_flush(void);
extern void queue_init(void);
#endif /*EMU_QUEUE_H*/

5
src/cpu/CMakeLists.txt
View File

@@ -14,7 +14,7 @@
#
add_library(cpu OBJECT cpu.c cpu_table.c fpu.c x86.c 808x.c 386.c 386_common.c
386_dynarec.c x86seg.c x87.c x87_timings.c 8080.c)
386_dynarec.c x86_ops_mmx.c x86seg.c x87.c x87_timings.c 8080.c)
if(AMD_K5)
target_compile_definitions(cpu PRIVATE USE_AMD_K5)
@@ -35,3 +35,6 @@ endif()
add_subdirectory(softfloat)
target_link_libraries(86Box softfloat)
add_subdirectory(808x)
target_link_libraries(86Box 808x)

1
src/cpu/cpu.c
View File

@@ -1646,6 +1646,7 @@ cpu_set(void)
cpu_exec = exec386;
else
cpu_exec = execx86;
mmx_init();
gdbstub_cpu_init();
}

5
src/cpu/cpu.h
View File

@@ -850,4 +850,9 @@ extern void cpu_fast_off_reset(void);
extern void smi_raise(void);
extern void nmi_raise(void);
extern MMX_REG *MMP[8];
extern uint16_t *MMEP[8];
extern void mmx_init(void);
#endif /*EMU_CPU_H*/

216
src/cpu/x86_ops_3dnow.h
View File

@@ -36,17 +36,20 @@ static int
opPAVGUSB(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] + src.b[0] + 1) >> 1;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] + src.b[1] + 1) >> 1;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] + src.b[2] + 1) >> 1;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] + src.b[3] + 1) >> 1;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] + src.b[4] + 1) >> 1;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] + src.b[5] + 1) >> 1;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] + src.b[6] + 1) >> 1;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] + src.b[7] + 1) >> 1;
dst->b[0] = (dst->b[0] + src.b[0] + 1) >> 1;
dst->b[1] = (dst->b[1] + src.b[1] + 1) >> 1;
dst->b[2] = (dst->b[2] + src.b[2] + 1) >> 1;
dst->b[3] = (dst->b[3] + src.b[3] + 1) >> 1;
dst->b[4] = (dst->b[4] + src.b[4] + 1) >> 1;
dst->b[5] = (dst->b[5] + src.b[5] + 1) >> 1;
dst->b[6] = (dst->b[6] + src.b[6] + 1) >> 1;
dst->b[7] = (dst->b[7] + src.b[7] + 1) >> 1;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -54,11 +57,14 @@ static int
opPF2ID(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].sl[0] = (int32_t) src.f[0];
cpu_state.MM[cpu_reg].sl[1] = (int32_t) src.f[1];
dst->sl[0] = (int32_t) src.f[0];
dst->sl[1] = (int32_t) src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -66,11 +72,14 @@ static int
opPF2IW(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].sw[0] = (int32_t) src.f[0];
cpu_state.MM[cpu_reg].sw[1] = (int32_t) src.f[1];
dst->sw[0] = (int32_t) src.f[0];
dst->sw[1] = (int32_t) src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -78,13 +87,16 @@ static int
opPFACC(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
float tempf;
MMX_GETSRC();
tempf = cpu_state.MM[cpu_reg].f[0] + cpu_state.MM[cpu_reg].f[1];
cpu_state.MM[cpu_reg].f[1] = src.f[0] + src.f[1];
cpu_state.MM[cpu_reg].f[0] = tempf;
tempf = dst->f[0] + dst->f[1];
dst->f[1] = src.f[0] + src.f[1];
dst->f[0] = tempf;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -92,13 +104,16 @@ static int
opPFNACC(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
float tempf;
MMX_GETSRC();
tempf = cpu_state.MM[cpu_reg].f[0] - cpu_state.MM[cpu_reg].f[1];
cpu_state.MM[cpu_reg].f[1] = src.f[0] - src.f[1];
cpu_state.MM[cpu_reg].f[0] = tempf;
tempf = dst->f[0] - dst->f[1];
dst->f[1] = src.f[0] - src.f[1];
dst->f[0] = tempf;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -106,13 +121,16 @@ static int
opPFPNACC(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
float tempf;
MMX_GETSRC();
tempf = cpu_state.MM[cpu_reg].f[0] - cpu_state.MM[cpu_reg].f[1];
cpu_state.MM[cpu_reg].f[1] = src.f[0] + src.f[1];
cpu_state.MM[cpu_reg].f[0] = tempf;
tempf = dst->f[0] - dst->f[1];
dst->f[1] = src.f[0] + src.f[1];
dst->f[0] = tempf;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -120,15 +138,18 @@ static int
opPSWAPD(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
float tempf, tempf2;
MMX_GETSRC();
/* We have to do this in case source and destination overlap. */
tempf = src.f[0];
tempf2 = src.f[1];
cpu_state.MM[cpu_reg].f[1] = tempf;
cpu_state.MM[cpu_reg].f[0] = tempf2;
tempf = src.f[0];
tempf2 = src.f[1];
dst->f[1] = tempf;
dst->f[0] = tempf2;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -136,11 +157,14 @@ static int
opPFADD(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] += src.f[0];
cpu_state.MM[cpu_reg].f[1] += src.f[1];
dst->f[0] += src.f[0];
dst->f[1] += src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -148,11 +172,14 @@ static int
opPFCMPEQ(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] == src.f[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] == src.f[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->f[0] == src.f[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->f[1] == src.f[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -160,11 +187,14 @@ static int
opPFCMPGE(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] >= src.f[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] >= src.f[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->f[0] >= src.f[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->f[1] >= src.f[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -172,11 +202,14 @@ static int
opPFCMPGT(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].f[0] > src.f[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].f[1] > src.f[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->f[0] > src.f[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->f[1] > src.f[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -184,13 +217,16 @@ static int
opPFMAX(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
if (src.f[0] > cpu_state.MM[cpu_reg].f[0])
cpu_state.MM[cpu_reg].f[0] = src.f[0];
if (src.f[1] > cpu_state.MM[cpu_reg].f[1])
cpu_state.MM[cpu_reg].f[1] = src.f[1];
if (src.f[0] > dst->f[0])
dst->f[0] = src.f[0];
if (src.f[1] > dst->f[1])
dst->f[1] = src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -198,13 +234,16 @@ static int
opPFMIN(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
if (src.f[0] < cpu_state.MM[cpu_reg].f[0])
cpu_state.MM[cpu_reg].f[0] = src.f[0];
if (src.f[1] < cpu_state.MM[cpu_reg].f[1])
cpu_state.MM[cpu_reg].f[1] = src.f[1];
if (src.f[0] < dst->f[0])
dst->f[0] = src.f[0];
if (src.f[1] < dst->f[1])
dst->f[1] = src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -212,24 +251,29 @@ static int
opPFMUL(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] *= src.f[0];
cpu_state.MM[cpu_reg].f[1] *= src.f[1];
dst->f[0] *= src.f[0];
dst->f[1] *= src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPFRCP(uint32_t fetchdat)
{
MMX_REG *dst = MMX_GETREGP(cpu_reg);
union {
uint32_t i;
float f;
} src;
if (cpu_mod == 3) {
src.f = cpu_state.MM[cpu_rm].f[0];
src.f = (MMX_GETREG(cpu_rm)).f[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
@@ -239,8 +283,10 @@ opPFRCP(uint32_t fetchdat)
CLOCK_CYCLES(2);
}
cpu_state.MM[cpu_reg].f[0] = 1.0 / src.f;
cpu_state.MM[cpu_reg].f[1] = cpu_state.MM[cpu_reg].f[0];
dst->f[0] = 1.0 / src.f;
dst->f[1] = dst->f[0];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -249,11 +295,14 @@ static int
opPFRCPIT1(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] = src.f[0];
cpu_state.MM[cpu_reg].f[1] = src.f[1];
dst->f[0] = src.f[0];
dst->f[1] = src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -261,24 +310,29 @@ static int
opPFRCPIT2(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] = src.f[0];
cpu_state.MM[cpu_reg].f[1] = src.f[1];
dst->f[0] = src.f[0];
dst->f[1] = src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPFRSQRT(uint32_t fetchdat)
{
MMX_REG *dst = MMX_GETREGP(cpu_reg);
union {
uint32_t i;
float f;
} src;
if (cpu_mod == 3) {
src.f = cpu_state.MM[cpu_rm].f[0];
src.f = (MMX_GETREG(cpu_rm)).f[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
@@ -288,8 +342,10 @@ opPFRSQRT(uint32_t fetchdat)
CLOCK_CYCLES(2);
}
cpu_state.MM[cpu_reg].f[0] = 1.0 / sqrt(src.f);
cpu_state.MM[cpu_reg].f[1] = cpu_state.MM[cpu_reg].f[0];
dst->f[0] = 1.0 / sqrt(src.f);
dst->f[1] = dst->f[0];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -308,11 +364,14 @@ static int
opPFSUB(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] -= src.f[0];
cpu_state.MM[cpu_reg].f[1] -= src.f[1];
dst->f[0] -= src.f[0];
dst->f[1] -= src.f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -320,11 +379,14 @@ static int
opPFSUBR(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] = src.f[0] - cpu_state.MM[cpu_reg].f[0];
cpu_state.MM[cpu_reg].f[1] = src.f[1] - cpu_state.MM[cpu_reg].f[1];
dst->f[0] = src.f[0] - dst->f[0];
dst->f[1] = src.f[1] - dst->f[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -332,11 +394,14 @@ static int
opPI2FD(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] = (float) src.sl[0];
cpu_state.MM[cpu_reg].f[1] = (float) src.sl[1];
dst->f[0] = (float) src.sl[0];
dst->f[1] = (float) src.sl[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -344,37 +409,46 @@ static int
opPI2FW(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].f[0] = (float) src.sw[0];
cpu_state.MM[cpu_reg].f[1] = (float) src.sw[1];
dst->f[0] = (float) src.sw[0];
dst->f[1] = (float) src.sw[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULHRW(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].w[0] = (((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) + 0x8000) >> 16;
cpu_state.MM[cpu_reg].w[1] = (((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) + 0x8000) >> 16;
cpu_state.MM[cpu_reg].w[2] = (((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) + 0x8000) >> 16;
cpu_state.MM[cpu_reg].w[3] = (((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) + 0x8000) >> 16;
src = MMX_GETREG(cpu_rm);
dst->w[0] = (((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16;
dst->w[1] = (((int32_t) dst->sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16;
dst->w[2] = (((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16;
dst->w[3] = (((int32_t) dst->sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16;
CLOCK_CYCLES(1);
} else {
MMX_REG src;
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
if (cpu_state.abrt)
return 0;
cpu_state.MM[cpu_reg].w[0] = ((int32_t) (cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16;
cpu_state.MM[cpu_reg].w[1] = ((int32_t) (cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16;
cpu_state.MM[cpu_reg].w[2] = ((int32_t) (cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16;
cpu_state.MM[cpu_reg].w[3] = ((int32_t) (cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16;
dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x8000) >> 16;
dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x8000) >> 16;
dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x8000) >> 16;
dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x8000) >> 16;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}

132
src/cpu/x86_ops_i686.h
View File

@@ -43,6 +43,132 @@ opSYSEXIT(uint32_t fetchdat)
return ret;
}
static int
sf_fx_save_stor_common(uint32_t fetchdat, int bits)
{
uint8_t fxinst = 0;
uint32_t tag_byte;
unsigned index;
floatx80 reg;
if (CPUID < 0x650)
return ILLEGAL(fetchdat);
FP_ENTER();
if (bits == 32) {
fetch_ea_32(fetchdat);
} else {
fetch_ea_16(fetchdat);
}
if (cpu_state.eaaddr & 0xf) {
x386_dynarec_log("Effective address %08X not on 16-byte boundary\n", cpu_state.eaaddr);
x86gpf(NULL, 0);
return cpu_state.abrt;
}
fxinst = (rmdat >> 3) & 7;
if ((fxinst > 1) || (cpu_mod == 3)) {
x86illegal();
return cpu_state.abrt;
}
FP_ENTER();
if (fxinst == 1) {
/* FXRSTOR */
fpu_state.cwd = readmemw(easeg, cpu_state.eaaddr);
fpu_state.swd = readmemw(easeg, cpu_state.eaaddr + 2);
fpu_state.tos = (fpu_state.swd >> 11) & 7;
/* always set bit 6 as '1 */
fpu_state.cwd = (fpu_state.cwd & ~FPU_CW_Reserved_Bits) | 0x0040;
/* Restore x87 FPU Opcode */
/* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */
fpu_state.foo = readmemw(easeg, cpu_state.eaaddr + 6) & 0x7FF;
fpu_state.fip = readmeml(easeg, cpu_state.eaaddr + 8);
fpu_state.fcs = readmemw(easeg, cpu_state.eaaddr + 12);
tag_byte = readmemb(easeg, cpu_state.eaaddr + 4);
fpu_state.fdp = readmeml(easeg, cpu_state.eaaddr + 16);
fpu_state.fds = readmemw(easeg, cpu_state.eaaddr + 20);
/* load i387 register file */
for (index = 0; index < 8; index++) {
reg.fraction = readmemq(easeg, cpu_state.eaaddr + (index * 16) + 32);
reg.exp = readmemw(easeg, cpu_state.eaaddr + (index * 16) + 40);
// update tag only if it is not empty
FPU_save_regi_tag(reg, IS_TAG_EMPTY(index) ? X87_TAG_EMPTY : FPU_tagof(reg), index);
}
fpu_state.tag = unpack_FPU_TW(tag_byte);
/* check for unmasked exceptions */
if (fpu_state.swd & ~fpu_state.cwd & FPU_CW_Exceptions_Mask) {
/* set the B and ES bits in the status-word */
fpu_state.swd |= (FPU_SW_Summary | FPU_SW_Backward);
} else {
/* clear the B and ES bits in the status-word */
fpu_state.swd &= ~(FPU_SW_Summary | FPU_SW_Backward);
}
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
} else {
/* FXSAVE */
writememw(easeg, cpu_state.eaaddr, i387_get_control_word());
writememw(easeg, cpu_state.eaaddr + 2, i387_get_status_word());
writememw(easeg, cpu_state.eaaddr + 4, pack_FPU_TW(fpu_state.tag));
/* x87 FPU Opcode (16 bits) */
/* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */
writememw(easeg, cpu_state.eaaddr + 6, fpu_state.foo);
/*
* x87 FPU IP Offset (32/64 bits)
* The contents of this field differ depending on the current
* addressing mode (16/32/64 bit) when the FXSAVE instruction was executed:
* + 64-bit mode - 64-bit IP offset
* + 32-bit mode - 32-bit IP offset
* + 16-bit mode - low 16 bits are IP offset; high 16 bits are reserved.
* x87 CS FPU IP Selector
* + 16 bit, in 16/32 bit mode only
*/
writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip);
writememl(easeg, cpu_state.eaaddr + 12, fpu_state.fcs);
/*
* x87 FPU Instruction Operand (Data) Pointer Offset (32/64 bits)
* The contents of this field differ depending on the current
* addressing mode (16/32 bit) when the FXSAVE instruction was executed:
* + 64-bit mode - 64-bit offset
* + 32-bit mode - 32-bit offset
* + 16-bit mode - low 16 bits are offset; high 16 bits are reserved.
* x87 DS FPU Instruction Operand (Data) Pointer Selector
* + 16 bit, in 16/32 bit mode only
*/
writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp);
writememl(easeg, cpu_state.eaaddr + 20, fpu_state.fds);
/* store i387 register file */
for (index = 0; index < 8; index++) {
const floatx80 fp = FPU_read_regi(index);
writememq(easeg, cpu_state.eaaddr + (index * 16) + 32, fp.fraction);
writememw(easeg, cpu_state.eaaddr + (index * 16) + 40, fp.exp);
}
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
}
return cpu_state.abrt;
}
static int
fx_save_stor_common(uint32_t fetchdat, int bits)
{
@@ -253,12 +379,18 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
static int
opFXSAVESTOR_a16(uint32_t fetchdat)
{
if (fpu_softfloat)
return sf_fx_save_stor_common(fetchdat, 16);
return fx_save_stor_common(fetchdat, 16);
}
static int
opFXSAVESTOR_a32(uint32_t fetchdat)
{
if (fpu_softfloat)
return sf_fx_save_stor_common(fetchdat, 32);
return fx_save_stor_common(fetchdat, 32);
}

50
src/cpu/x86_ops_mmx.c Normal file
View File

@@ -0,0 +1,50 @@
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <math.h>
#ifndef INFINITY
# define INFINITY (__builtin_inff())
#endif
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include "x86.h"
#include "x87.h"
#include <86box/nmi.h>
#include <86box/mem.h>
#include <86box/smram.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/keyboard.h>
#include <86box/timer.h>
#include "386_common.h"
#include "x86_flags.h"
#include "x86seg.h"
MMX_REG *MMP[8];
uint16_t *MMEP[8];
static uint16_t MME[8];
#define MMX_GETREGP(r) fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[r].fraction) : &(cpu_state.MM[r])
void
mmx_init(void)
{
memset(MME, 0xff, sizeof(MME));
for (uint8_t i = 0; i < 8; i++) {
if (fpu_softfloat) {
MMP[i] = (MMX_REG *) &fpu_state.st_space[i].fraction;
MMEP[i] = (uint16_t *) &fpu_state.st_space[i].exp;
} else {
MMP[i] = &(cpu_state.MM[i]);
MMEP[i] = &(MME[i]);
}
}
}

8
src/cpu/x86_ops_mmx.h
View File

@@ -3,9 +3,15 @@
#define USATB(val) (((val) < 0) ? 0 : (((val) > 255) ? 255 : (val)))
#define USATW(val) (((val) < 0) ? 0 : (((val) > 65535) ? 65535 : (val)))
#define MMX_GETREGP(r) MMP[r]
#define MMX_GETREG(r) *(MMP[r])
#define MMX_SETEXP(r) \
*(MMEP[r]) = 0xffff
#define MMX_GETSRC() \
if (cpu_mod == 3) { \
src = cpu_state.MM[cpu_rm]; \
src = MMX_GETREG(cpu_rm); \
CLOCK_CYCLES(1); \
} else { \
SEG_CHECK_READ(cpu_state.ea_seg); \

626
src/cpu/x86_ops_mmx_arith.h
View File

File diff suppressed because it is too large Load Diff

196
src/cpu/x86_ops_mmx_cmp.h
View File

@@ -2,20 +2,25 @@ static int
opPCMPEQB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -23,20 +28,25 @@ static int
opPCMPEQB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -45,20 +55,25 @@ static int
opPCMPGTB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -66,20 +81,25 @@ static int
opPCMPGTB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -88,16 +108,21 @@ static int
opPCMPEQW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -105,16 +130,21 @@ static int
opPCMPEQW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -123,16 +153,21 @@ static int
opPCMPGTW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -140,16 +175,21 @@ static int
opPCMPGTW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -158,14 +198,19 @@ static int
opPCMPEQD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -173,14 +218,19 @@ static int
opPCMPEQD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -189,14 +239,19 @@ static int
opPCMPGTD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -204,14 +259,19 @@ static int
opPCMPGTD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}

72
src/cpu/x86_ops_mmx_logic.h
View File

@@ -2,24 +2,38 @@ static int
opPAND_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q &= src.q;
dst->q &= src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPAND_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q &= src.q;
dst->q &= src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -27,24 +41,38 @@ static int
opPANDN_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
dst->q = ~dst->q & src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPANDN_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
dst->q = ~dst->q & src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -52,24 +80,38 @@ static int
opPOR_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q |= src.q;
dst->q |= src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPOR_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q |= src.q;
dst->q |= src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -77,23 +119,37 @@ static int
opPXOR_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q ^= src.q;
dst->q ^= src.q;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPXOR_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].q ^= src.q;
dst->q ^= src.q;
MMX_SETEXP(cpu_reg);
return 0;
}

142
src/cpu/x86_ops_mmx_mov.h
View File

@@ -1,88 +1,112 @@
static int
opMOVD_l_mm_a16(uint32_t fetchdat)
{
uint32_t dst;
MMX_REG *op;
MMX_ENTER();
fetch_ea_16(fetchdat);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
cpu_state.MM[cpu_reg].l[1] = 0;
op->l[0] = cpu_state.regs[cpu_rm].l;
op->l[1] = 0;
CLOCK_CYCLES(1);
} else {
uint32_t dst;
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].l[0] = dst;
cpu_state.MM[cpu_reg].l[1] = 0;
op->l[0] = dst;
op->l[1] = 0;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opMOVD_l_mm_a32(uint32_t fetchdat)
{
uint32_t dst;
MMX_REG *op;
MMX_ENTER();
fetch_ea_32(fetchdat);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
cpu_state.MM[cpu_reg].l[1] = 0;
op->l[0] = cpu_state.regs[cpu_rm].l;
op->l[1] = 0;
CLOCK_CYCLES(1);
} else {
uint32_t dst;
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].l[0] = dst;
cpu_state.MM[cpu_reg].l[1] = 0;
op->l[0] = dst;
op->l[1] = 0;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opMOVD_mm_l_a16(uint32_t fetchdat)
{
MMX_REG *op;
MMX_ENTER();
fetch_ea_16(fetchdat);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
}
return 0;
}
static int
opMOVD_mm_l_a32(uint32_t fetchdat)
{
MMX_REG *op;
MMX_ENTER();
fetch_ea_32(fetchdat);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
}
return 0;
}
@@ -91,45 +115,59 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
static int
opMOVD_mm_l_a16_cx(uint32_t fetchdat)
{
MMX_REG *op;
if (in_smm)
return opSMINT(fetchdat);
MMX_ENTER();
fetch_ea_16(fetchdat);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
}
return 0;
}
static int
opMOVD_mm_l_a32_cx(uint32_t fetchdat)
{
MMX_REG *op;
if (in_smm)
return opSMINT(fetchdat);
MMX_ENTER();
fetch_ea_32(fetchdat);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
}
return 0;
}
#endif
@@ -137,81 +175,121 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
static int
opMOVQ_q_mm_a16(uint32_t fetchdat)
{
uint64_t dst;
MMX_REG src;
MMX_REG *op;
MMX_ENTER();
fetch_ea_16(fetchdat);
src = MMX_GETREG(cpu_rm);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
op->q = src.q;
CLOCK_CYCLES(1);
} else {
uint64_t dst;
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].q = dst;
op->q = dst;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opMOVQ_q_mm_a32(uint32_t fetchdat)
{
uint64_t dst;
MMX_REG src;
MMX_REG *op;
MMX_ENTER();
fetch_ea_32(fetchdat);
src = MMX_GETREG(cpu_rm);
op = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
op->q = src.q;
CLOCK_CYCLES(1);
} else {
uint64_t dst;
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].q = dst;
op->q = dst;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opMOVQ_mm_q_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
src = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_rm);
if (cpu_mod == 3) {
cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
dst->q = src.q;
CLOCK_CYCLES(1);
MMX_SETEXP(cpu_rm);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q);
writememq(easeg, cpu_state.eaaddr, src.q);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
}
return 0;
}
static int
opMOVQ_mm_q_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
src = MMX_GETREG(cpu_reg);
dst = MMX_GETREGP(cpu_rm);
if (cpu_mod == 3) {
cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
dst->q = src.q;
CLOCK_CYCLES(1);
MMX_SETEXP(cpu_rm);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q);
writememq(easeg, cpu_state.eaaddr, src.q);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
}
return 0;
}

350
src/cpu/x86_ops_mmx_pack.h
View File

@@ -1,45 +1,61 @@
static int
opPUNPCKLDQ_a16(uint32_t fetchdat)
{
uint32_t usrc;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
src = MMX_GETREG(cpu_rm);
dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
dst->l[1] = src.l[0];
CLOCK_CYCLES(1);
} else {
uint32_t src;
SEG_CHECK_READ(cpu_state.ea_seg);
src = readmeml(easeg, cpu_state.eaaddr);
usrc = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 0;
cpu_state.MM[cpu_reg].l[1] = src;
dst->l[1] = usrc;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPUNPCKLDQ_a32(uint32_t fetchdat)
{
uint32_t usrc;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
src = MMX_GETREG(cpu_rm);
dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
dst->l[1] = src.l[0];
CLOCK_CYCLES(1);
} else {
uint32_t src;
SEG_CHECK_READ(cpu_state.ea_seg);
src = readmeml(easeg, cpu_state.eaaddr);
usrc = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 0;
cpu_state.MM[cpu_reg].l[1] = src;
dst->l[1] = usrc;
CLOCK_CYCLES(2);
}
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -47,13 +63,19 @@ static int
opPUNPCKHDQ_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
cpu_state.MM[cpu_reg].l[1] = src.l[1];
dst->l[0] = dst->l[1];
dst->l[1] = src.l[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -61,13 +83,19 @@ static int
opPUNPCKHDQ_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
cpu_state.MM[cpu_reg].l[1] = src.l[1];
dst->l[0] = dst->l[1];
dst->l[1] = src.l[1];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -76,19 +104,25 @@ static int
opPUNPCKLBW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[7] = src.b[3];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
cpu_state.MM[cpu_reg].b[5] = src.b[2];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2];
cpu_state.MM[cpu_reg].b[3] = src.b[1];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
cpu_state.MM[cpu_reg].b[1] = src.b[0];
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
dst->b[7] = src.b[3];
dst->b[6] = dst->b[3];
dst->b[5] = src.b[2];
dst->b[4] = dst->b[2];
dst->b[3] = src.b[1];
dst->b[2] = dst->b[1];
dst->b[1] = src.b[0];
dst->b[0] = dst->b[0];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -96,19 +130,25 @@ static int
opPUNPCKLBW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[7] = src.b[3];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
cpu_state.MM[cpu_reg].b[5] = src.b[2];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2];
cpu_state.MM[cpu_reg].b[3] = src.b[1];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
cpu_state.MM[cpu_reg].b[1] = src.b[0];
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
dst->b[7] = src.b[3];
dst->b[6] = dst->b[3];
dst->b[5] = src.b[2];
dst->b[4] = dst->b[2];
dst->b[3] = src.b[1];
dst->b[2] = dst->b[1];
dst->b[1] = src.b[0];
dst->b[0] = dst->b[0];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -117,19 +157,25 @@ static int
opPUNPCKHBW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
cpu_state.MM[cpu_reg].b[1] = src.b[4];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
cpu_state.MM[cpu_reg].b[3] = src.b[5];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6];
cpu_state.MM[cpu_reg].b[5] = src.b[6];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
cpu_state.MM[cpu_reg].b[7] = src.b[7];
dst->b[0] = dst->b[4];
dst->b[1] = src.b[4];
dst->b[2] = dst->b[5];
dst->b[3] = src.b[5];
dst->b[4] = dst->b[6];
dst->b[5] = src.b[6];
dst->b[6] = dst->b[7];
dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -137,19 +183,25 @@ static int
opPUNPCKHBW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
cpu_state.MM[cpu_reg].b[1] = src.b[4];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
cpu_state.MM[cpu_reg].b[3] = src.b[5];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6];
cpu_state.MM[cpu_reg].b[5] = src.b[6];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
cpu_state.MM[cpu_reg].b[7] = src.b[7];
dst->b[0] = dst->b[4];
dst->b[1] = src.b[4];
dst->b[2] = dst->b[5];
dst->b[3] = src.b[5];
dst->b[4] = dst->b[6];
dst->b[5] = src.b[6];
dst->b[6] = dst->b[7];
dst->b[7] = src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -158,15 +210,21 @@ static int
opPUNPCKLWD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[3] = src.w[1];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
cpu_state.MM[cpu_reg].w[1] = src.w[0];
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
dst->w[3] = src.w[1];
dst->w[2] = dst->w[1];
dst->w[1] = src.w[0];
dst->w[0] = dst->w[0];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -174,15 +232,21 @@ static int
opPUNPCKLWD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[3] = src.w[1];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
cpu_state.MM[cpu_reg].w[1] = src.w[0];
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
dst->w[3] = src.w[1];
dst->w[2] = dst->w[1];
dst->w[1] = src.w[0];
dst->w[0] = dst->w[0];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -191,15 +255,21 @@ static int
opPUNPCKHWD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
cpu_state.MM[cpu_reg].w[1] = src.w[2];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
cpu_state.MM[cpu_reg].w[3] = src.w[3];
dst->w[0] = dst->w[2];
dst->w[1] = src.w[2];
dst->w[2] = dst->w[3];
dst->w[3] = src.w[3];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -207,15 +277,21 @@ static int
opPUNPCKHWD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
cpu_state.MM[cpu_reg].w[1] = src.w[2];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
cpu_state.MM[cpu_reg].w[3] = src.w[3];
dst->w[0] = dst->w[2];
dst->w[1] = src.w[2];
dst->w[2] = dst->w[3];
dst->w[3] = src.w[3];
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -223,42 +299,52 @@ opPUNPCKHWD_a32(uint32_t fetchdat)
static int
opPACKSSWB_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
MMX_GETSRC();
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]);
cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]);
cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]);
cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]);
cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sb[0] = SSATB(dst->sw[0]);
dst->sb[1] = SSATB(dst->sw[1]);
dst->sb[2] = SSATB(dst->sw[2]);
dst->sb[3] = SSATB(dst->sw[3]);
dst->sb[4] = SSATB(src.sw[0]);
dst->sb[5] = SSATB(src.sw[1]);
dst->sb[6] = SSATB(src.sw[2]);
dst->sb[7] = SSATB(src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPACKSSWB_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
MMX_GETSRC();
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]);
cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]);
cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]);
cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]);
cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sb[0] = SSATB(dst->sw[0]);
dst->sb[1] = SSATB(dst->sw[1]);
dst->sb[2] = SSATB(dst->sw[2]);
dst->sb[3] = SSATB(dst->sw[3]);
dst->sb[4] = SSATB(src.sw[0]);
dst->sb[5] = SSATB(src.sw[1]);
dst->sb[6] = SSATB(src.sw[2]);
dst->sb[7] = SSATB(src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -266,42 +352,52 @@ opPACKSSWB_a32(uint32_t fetchdat)
static int
opPACKUSWB_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
MMX_GETSRC();
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]);
cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]);
cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]);
cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]);
cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = USATB(dst->sw[0]);
dst->b[1] = USATB(dst->sw[1]);
dst->b[2] = USATB(dst->sw[2]);
dst->b[3] = USATB(dst->sw[3]);
dst->b[4] = USATB(src.sw[0]);
dst->b[5] = USATB(src.sw[1]);
dst->b[6] = USATB(src.sw[2]);
dst->b[7] = USATB(src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPACKUSWB_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
MMX_GETSRC();
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]);
cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]);
cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]);
cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]);
cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = USATB(dst->sw[0]);
dst->b[1] = USATB(dst->sw[1]);
dst->b[2] = USATB(dst->sw[2]);
dst->b[3] = USATB(dst->sw[3]);
dst->b[4] = USATB(src.sw[0]);
dst->b[5] = USATB(src.sw[1]);
dst->b[6] = USATB(src.sw[2]);
dst->b[7] = USATB(src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -309,34 +405,48 @@ opPACKUSWB_a32(uint32_t fetchdat)
static int
opPACKSSDW_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_REG dst2;
MMX_ENTER();
fetch_ea_16(fetchdat);
MMX_GETSRC();
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
dst = MMX_GETREGP(cpu_reg);
dst2 = *dst;
MMX_GETSRC();
dst->sw[0] = SSATW(dst2.sl[0]);
dst->sw[1] = SSATW(dst2.sl[1]);
dst->sw[2] = SSATW(src.sl[0]);
dst->sw[3] = SSATW(src.sl[1]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPACKSSDW_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_REG dst2;
MMX_ENTER();
fetch_ea_32(fetchdat);
MMX_GETSRC();
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
dst = MMX_GETREGP(cpu_reg);
dst2 = *dst;
MMX_GETSRC();
dst->sw[0] = SSATW(dst2.sl[0]);
dst->sw[1] = SSATW(dst2.sl[1]);
dst->sw[2] = SSATW(src.sl[0]);
dst->sw[3] = SSATW(src.sl[1]);
MMX_SETEXP(cpu_reg);
return 0;
}

272
src/cpu/x86_ops_mmx_shift.h
View File

@@ -1,6 +1,6 @@
#define MMX_GETSHIFT() \
if (cpu_mod == 3) { \
shift = cpu_state.MM[cpu_rm].b[0]; \
shift = (MMX_GETREG(cpu_rm)).b[0]; \
CLOCK_CYCLES(1); \
} else { \
SEG_CHECK_READ(cpu_state.ea_seg); \
@@ -16,37 +16,39 @@ opPSxxW_imm(uint32_t fetchdat)
int reg = fetchdat & 7;
int op = fetchdat & 0x38;
int shift = (fetchdat >> 8) & 0xff;
MMX_REG *dst;
cpu_state.pc += 2;
MMX_ENTER();
dst = MMX_GETREGP(reg);
switch (op) {
case 0x10: /*PSRLW*/
if (shift > 15)
cpu_state.MM[reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[reg].w[0] >>= shift;
cpu_state.MM[reg].w[1] >>= shift;
cpu_state.MM[reg].w[2] >>= shift;
cpu_state.MM[reg].w[3] >>= shift;
dst->w[0] >>= shift;
dst->w[1] >>= shift;
dst->w[2] >>= shift;
dst->w[3] >>= shift;
}
break;
case 0x20: /*PSRAW*/
if (shift > 15)
shift = 15;
cpu_state.MM[reg].sw[0] >>= shift;
cpu_state.MM[reg].sw[1] >>= shift;
cpu_state.MM[reg].sw[2] >>= shift;
cpu_state.MM[reg].sw[3] >>= shift;
dst->sw[0] >>= shift;
dst->sw[1] >>= shift;
dst->sw[2] >>= shift;
dst->sw[3] >>= shift;
break;
case 0x30: /*PSLLW*/
if (shift > 15)
cpu_state.MM[reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[reg].w[0] <<= shift;
cpu_state.MM[reg].w[1] <<= shift;
cpu_state.MM[reg].w[2] <<= shift;
cpu_state.MM[reg].w[3] <<= shift;
dst->w[0] <<= shift;
dst->w[1] <<= shift;
dst->w[2] <<= shift;
dst->w[3] <<= shift;
}
break;
default:
@@ -55,6 +57,8 @@ opPSxxW_imm(uint32_t fetchdat)
return 0;
}
MMX_SETEXP(reg);
CLOCK_CYCLES(1);
return 0;
}
@@ -62,126 +66,162 @@ opPSxxW_imm(uint32_t fetchdat)
static int
opPSLLW_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 15)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].w[0] <<= shift;
cpu_state.MM[cpu_reg].w[1] <<= shift;
cpu_state.MM[cpu_reg].w[2] <<= shift;
cpu_state.MM[cpu_reg].w[3] <<= shift;
dst->w[0] <<= shift;
dst->w[1] <<= shift;
dst->w[2] <<= shift;
dst->w[3] <<= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSLLW_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 15)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].w[0] <<= shift;
cpu_state.MM[cpu_reg].w[1] <<= shift;
cpu_state.MM[cpu_reg].w[2] <<= shift;
cpu_state.MM[cpu_reg].w[3] <<= shift;
dst->w[0] <<= shift;
dst->w[1] <<= shift;
dst->w[2] <<= shift;
dst->w[3] <<= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRLW_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 15)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].w[0] >>= shift;
cpu_state.MM[cpu_reg].w[1] >>= shift;
cpu_state.MM[cpu_reg].w[2] >>= shift;
cpu_state.MM[cpu_reg].w[3] >>= shift;
dst->w[0] >>= shift;
dst->w[1] >>= shift;
dst->w[2] >>= shift;
dst->w[3] >>= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRLW_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 15)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].w[0] >>= shift;
cpu_state.MM[cpu_reg].w[1] >>= shift;
cpu_state.MM[cpu_reg].w[2] >>= shift;
cpu_state.MM[cpu_reg].w[3] >>= shift;
dst->w[0] >>= shift;
dst->w[1] >>= shift;
dst->w[2] >>= shift;
dst->w[3] >>= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRAW_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 15)
shift = 15;
cpu_state.MM[cpu_reg].sw[0] >>= shift;
cpu_state.MM[cpu_reg].sw[1] >>= shift;
cpu_state.MM[cpu_reg].sw[2] >>= shift;
cpu_state.MM[cpu_reg].sw[3] >>= shift;
dst->sw[0] >>= shift;
dst->sw[1] >>= shift;
dst->sw[2] >>= shift;
dst->sw[3] >>= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRAW_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 15)
shift = 15;
cpu_state.MM[cpu_reg].sw[0] >>= shift;
cpu_state.MM[cpu_reg].sw[1] >>= shift;
cpu_state.MM[cpu_reg].sw[2] >>= shift;
cpu_state.MM[cpu_reg].sw[3] >>= shift;
dst->sw[0] >>= shift;
dst->sw[1] >>= shift;
dst->sw[2] >>= shift;
dst->sw[3] >>= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -192,31 +232,34 @@ opPSxxD_imm(uint32_t fetchdat)
int reg = fetchdat & 7;
int op = fetchdat & 0x38;
int shift = (fetchdat >> 8) & 0xff;
MMX_REG *dst;
cpu_state.pc += 2;
MMX_ENTER();
dst = MMX_GETREGP(reg);
switch (op) {
case 0x10: /*PSRLD*/
if (shift > 31)
cpu_state.MM[reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[reg].l[0] >>= shift;
cpu_state.MM[reg].l[1] >>= shift;
dst->l[0] >>= shift;
dst->l[1] >>= shift;
}
break;
case 0x20: /*PSRAD*/
if (shift > 31)
shift = 31;
cpu_state.MM[reg].sl[0] >>= shift;
cpu_state.MM[reg].sl[1] >>= shift;
dst->sl[0] >>= shift;
dst->sl[1] >>= shift;
break;
case 0x30: /*PSLLD*/
if (shift > 31)
cpu_state.MM[reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[reg].l[0] <<= shift;
cpu_state.MM[reg].l[1] <<= shift;
dst->l[0] <<= shift;
dst->l[1] <<= shift;
}
break;
default:
@@ -225,6 +268,8 @@ opPSxxD_imm(uint32_t fetchdat)
return 0;
}
MMX_SETEXP(reg);
CLOCK_CYCLES(1);
return 0;
}
@@ -232,114 +277,150 @@ opPSxxD_imm(uint32_t fetchdat)
static int
opPSLLD_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 31)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].l[0] <<= shift;
cpu_state.MM[cpu_reg].l[1] <<= shift;
dst->l[0] <<= shift;
dst->l[1] <<= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSLLD_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 31)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].l[0] <<= shift;
cpu_state.MM[cpu_reg].l[1] <<= shift;
dst->l[0] <<= shift;
dst->l[1] <<= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRLD_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 31)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].l[0] >>= shift;
cpu_state.MM[cpu_reg].l[1] >>= shift;
dst->l[0] >>= shift;
dst->l[1] >>= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRLD_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 31)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else {
cpu_state.MM[cpu_reg].l[0] >>= shift;
cpu_state.MM[cpu_reg].l[1] >>= shift;
dst->l[0] >>= shift;
dst->l[1] >>= shift;
}
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRAD_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 31)
shift = 31;
cpu_state.MM[cpu_reg].sl[0] >>= shift;
cpu_state.MM[cpu_reg].sl[1] >>= shift;
dst->sl[0] >>= shift;
dst->sl[1] >>= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRAD_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 31)
shift = 31;
cpu_state.MM[cpu_reg].sl[0] >>= shift;
cpu_state.MM[cpu_reg].sl[1] >>= shift;
dst->sl[0] >>= shift;
dst->sl[1] >>= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -350,27 +431,32 @@ opPSxxQ_imm(uint32_t fetchdat)
int reg = fetchdat & 7;
int op = fetchdat & 0x38;
int shift = (fetchdat >> 8) & 0xff;
MMX_REG *dst;
cpu_state.pc += 2;
MMX_ENTER();
dst = MMX_GETREGP(reg);
switch (op) {
case 0x10: /*PSRLW*/
if (shift > 63)
cpu_state.MM[reg].q = 0;
dst->q = 0;
else
cpu_state.MM[reg].q >>= shift;
dst->q >>= shift;
break;
case 0x20: /*PSRAW*/
if (shift > 63)
shift = 63;
cpu_state.MM[reg].sq >>= shift;
dst->sq >>= shift;
break;
case 0x30: /*PSLLW*/
if (shift > 63)
cpu_state.MM[reg].q = 0;
dst->q = 0;
else
cpu_state.MM[reg].q <<= shift;
dst->q <<= shift;
break;
default:
cpu_state.pc = cpu_state.oldpc;
@@ -378,6 +464,8 @@ opPSxxQ_imm(uint32_t fetchdat)
return 0;
}
MMX_SETEXP(reg);
CLOCK_CYCLES(1);
return 0;
}
@@ -385,34 +473,46 @@ opPSxxQ_imm(uint32_t fetchdat)
static int
opPSLLQ_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 63)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else
cpu_state.MM[cpu_reg].q <<= shift;
dst->q <<= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSLLQ_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 63)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else
cpu_state.MM[cpu_reg].q <<= shift;
dst->q <<= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
@@ -420,34 +520,46 @@ opPSLLQ_a32(uint32_t fetchdat)
static int
opPSRLQ_a16(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 63)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else
cpu_state.MM[cpu_reg].q >>= shift;
dst->q >>= shift;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSRLQ_a32(uint32_t fetchdat)
{
MMX_REG *dst;
int shift;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSHIFT();
if (shift > 63)
cpu_state.MM[cpu_reg].q = 0;
dst->q = 0;
else
cpu_state.MM[cpu_reg].q >>= shift;
dst->q >>= shift;
MMX_SETEXP(cpu_reg);
return 0;
}

73
src/cpu/x87.c
View File

@@ -439,6 +439,79 @@ FPU_tagof(const floatx80 reg)
return X87_TAG_VALID;
}
uint8_t
pack_FPU_TW(uint16_t twd)
{
uint8_t tag_byte = 0;
if ((twd & 0x0003) != 0x0003) tag_byte |= 0x01;
if ((twd & 0x000c) != 0x000c) tag_byte |= 0x02;
if ((twd & 0x0030) != 0x0030) tag_byte |= 0x04;
if ((twd & 0x00c0) != 0x00c0) tag_byte |= 0x08;
if ((twd & 0x0300) != 0x0300) tag_byte |= 0x10;
if ((twd & 0x0c00) != 0x0c00) tag_byte |= 0x20;
if ((twd & 0x3000) != 0x3000) tag_byte |= 0x40;
if ((twd & 0xc000) != 0xc000) tag_byte |= 0x80;
return tag_byte;
}
uint16_t
unpack_FPU_TW(uint16_t tag_byte)
{
uint32_t twd = 0;
/* FTW
*
* Note that the original format for FTW can be recreated from the stored
* FTW valid bits and the stored 80-bit FP data (assuming the stored data
* was not the contents of MMX registers) using the following table:
| Exponent | Exponent | Fraction | J,M bits | FTW valid | x87 FTW |
| all 1s | all 0s | all 0s | | | |
-------------------------------------------------------------------
| 0 | 0 | 0 | 0x | 1 | S 10 |
| 0 | 0 | 0 | 1x | 1 | V 00 |
-------------------------------------------------------------------
| 0 | 0 | 1 | 00 | 1 | S 10 |
| 0 | 0 | 1 | 10 | 1 | V 00 |
-------------------------------------------------------------------
| 0 | 1 | 0 | 0x | 1 | S 10 |
| 0 | 1 | 0 | 1x | 1 | S 10 |
-------------------------------------------------------------------
| 0 | 1 | 1 | 00 | 1 | Z 01 |
| 0 | 1 | 1 | 10 | 1 | S 10 |
-------------------------------------------------------------------
| 1 | 0 | 0 | 1x | 1 | S 10 |
| 1 | 0 | 0 | 1x | 1 | S 10 |
-------------------------------------------------------------------
| 1 | 0 | 1 | 00 | 1 | S 10 |
| 1 | 0 | 1 | 10 | 1 | S 10 |
-------------------------------------------------------------------
| all combinations above | 0 | E 11 |
*
* The J-bit is defined to be the 1-bit binary integer to the left of
* the decimal place in the significand.
*
* The M-bit is defined to be the most significant bit of the fractional
* portion of the significand (i.e., the bit immediately to the right of
* the decimal place). When the M-bit is the most significant bit of the
* fractional portion of the significand, it must be 0 if the fraction
* is all 0's.
*/
for (int index = 7; index >= 0; index--, twd <<= 2, tag_byte <<= 1) {
if (tag_byte & 0x80) {
const floatx80 *fpu_reg = &fpu_state.st_space[index & 7];
twd |= FPU_tagof(*fpu_reg);
} else {
twd |= X87_TAG_EMPTY;
}
}
return (twd >> 2);
}
#ifdef ENABLE_808X_LOG
void

22
src/cpu/x87.h
View File

@@ -10,9 +10,14 @@ static __inline void
x87_set_mmx(void)
{
uint64_t *p;
cpu_state.TOP = 0;
p = (uint64_t *) cpu_state.tag;
*p = 0x0101010101010101ull;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
} else {
cpu_state.TOP = 0;
p = (uint64_t *) cpu_state.tag;
*p = 0x0101010101010101ull;
}
cpu_state.ismmx = 1;
}
@@ -20,8 +25,13 @@ static __inline void
x87_emms(void)
{
uint64_t *p;
p = (uint64_t *) cpu_state.tag;
*p = 0;
if (fpu_softfloat) {
fpu_state.tag = 0xffff;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
} else {
p = (uint64_t *) cpu_state.tag;
*p = 0;
}
cpu_state.ismmx = 0;
}
@@ -141,6 +151,8 @@ void FPU_stack_underflow(uint32_t fetchdat, int stnr, int pop_stack);
int FPU_handle_NaN32(floatx80 a, float32 b, floatx80 *r, struct float_status_t *status);
int FPU_handle_NaN64(floatx80 a, float64 b, floatx80 *r, struct float_status_t *status);
int FPU_tagof(const floatx80 reg);
uint8_t pack_FPU_TW(uint16_t twd);
uint16_t unpack_FPU_TW(uint16_t tag_byte);
static __inline uint16_t
i387_get_control_word(void)

17
src/ddma.c
View File

@@ -34,6 +34,7 @@
#include <86box/pit.h>
#include <86box/dma.h>
#include <86box/ddma.h>
#include <86box/plat_unused.h>
#ifdef ENABLE_DDMA_LOG
int ddma_do_log = ENABLE_DDMA_LOG;
@@ -54,9 +55,9 @@ ddma_log(const char *fmt, ...)
#endif
static uint8_t
ddma_reg_read(uint16_t addr, void *p)
ddma_reg_read(uint16_t addr, void *priv)
{
ddma_channel_t *dev = (ddma_channel_t *) p;
ddma_channel_t *dev = (ddma_channel_t *) priv;
uint8_t ret = 0xff;
int ch = dev->channel;
int dmab = (ch >= 4) ? 0xc0 : 0x00;
@@ -80,15 +81,18 @@ ddma_reg_read(uint16_t addr, void *p)
case 0x09:
ret = inb(dmab + 0x08);
break;
default:
break;
}
return ret;
}
static void
ddma_reg_write(uint16_t addr, uint8_t val, void *p)
ddma_reg_write(uint16_t addr, uint8_t val, void *priv)
{
ddma_channel_t *dev = (ddma_channel_t *) p;
ddma_channel_t *dev = (ddma_channel_t *) priv;
int ch = dev->channel;
int page_regs[4] = { 7, 3, 1, 2 };
int dmab = (ch >= 4) ? 0xc0 : 0x00;
@@ -138,6 +142,9 @@ ddma_reg_write(uint16_t addr, uint8_t val, void *p)
case 0x0f:
outb(dmab + 0x0a, (val << 2) | (ch & 3));
break;
default:
break;
}
}
@@ -163,7 +170,7 @@ ddma_close(void *priv)
}
static void *
ddma_init(const device_t *info)
ddma_init(UNUSED(const device_t *info))
{
ddma_t *dev;

194
src/device.c
View File

@@ -88,46 +88,46 @@ device_init(void)
}
void
device_set_context(device_context_t *c, const device_t *d, int inst)
device_set_context(device_context_t *c, const device_t *dev, int inst)
{
void *sec;
void *single_sec;
memset(c, 0, sizeof(device_context_t));
c->dev = d;
c->dev = dev;
c->instance = inst;
if (inst) {
sprintf(c->name, "%s #%i", d->name, inst);
sprintf(c->name, "%s #%i", dev->name, inst);
/* If this is the first instance and a numbered section is not present, but a non-numbered
section of the same name is, rename the non-numbered section to numbered. */
if (inst == 1) {
sec = config_find_section(c->name);
single_sec = config_find_section((char *) d->name);
single_sec = config_find_section((char *) dev->name);
if ((sec == NULL) && (single_sec != NULL))
config_rename_section(single_sec, c->name);
}
} else
sprintf(c->name, "%s", d->name);
sprintf(c->name, "%s", dev->name);
}
static void
device_context_common(const device_t *d, int inst)
device_context_common(const device_t *dev, int inst)
{
memcpy(&device_prev, &device_current, sizeof(device_context_t));
device_set_context(&device_current, d, inst);
device_set_context(&device_current, dev, inst);
}
void
device_context(const device_t *d)
device_context(const device_t *dev)
{
device_context_common(d, 0);
device_context_common(dev, 0);
}
void
device_context_inst(const device_t *d, int inst)
device_context_inst(const device_t *dev, int inst)
{
device_context_common(d, inst);
device_context_common(dev, inst);
}
void
@@ -137,13 +137,13 @@ device_context_restore(void)
}
static void *
device_add_common(const device_t *d, const device_t *cd, void *p, void *params, int inst)
device_add_common(const device_t *dev, const device_t *cd, void *p, void *params, int inst)
{
void *priv = NULL;
int c;
for (c = 0; c < 256; c++) {
if (!inst && (devices[c] == (device_t *) d)) {
if (!inst && (devices[c] == (device_t *) dev)) {
device_log("DEVICE: device already exists!\n");
return (NULL);
}
@@ -157,17 +157,17 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
/* Do this so that a chained device_add will not identify the same ID
its master device is already trying to assign. */
devices[c] = (device_t *) d;
devices[c] = (device_t *) dev;
if (p == NULL) {
memcpy(&device_prev, &device_current, sizeof(device_context_t));
device_set_context(&device_current, cd, inst);
if (d->init != NULL) {
priv = (d->flags & DEVICE_EXTPARAMS) ? d->init_ext(d, params) : d->init(d);
if (dev->init != NULL) {
priv = (dev->flags & DEVICE_EXTPARAMS) ? dev->init_ext(dev, params) : dev->init(dev);
if (priv == NULL) {
if (d->name)
device_log("DEVICE: device '%s' init failed\n", d->name);
if (dev->name)
device_log("DEVICE: device '%s' init failed\n", dev->name);
else
device_log("DEVICE: device init failed\n");
@@ -178,8 +178,8 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
}
}
if (d->name)
device_log("DEVICE: device '%s' init successful\n", d->name);
if (dev->name)
device_log("DEVICE: device '%s' init successful\n", dev->name);
else
device_log("DEVICE: device init successful\n");
@@ -192,114 +192,114 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
}
char *
device_get_internal_name(const device_t *d)
device_get_internal_name(const device_t *dev)
{
if (d == NULL)
if (dev == NULL)
return "";
return (char *) d->internal_name;
return (char *) dev->internal_name;
}
void *
device_add(const device_t *d)
device_add(const device_t *dev)
{
return device_add_common(d, d, NULL, NULL, 0);
return device_add_common(dev, dev, NULL, NULL, 0);
}
void *
device_add_parameters(const device_t *d, void *params)
device_add_parameters(const device_t *dev, void *params)
{
return device_add_common(d, d, NULL, params, 0);
return device_add_common(dev, dev, NULL, params, 0);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_add_ex(const device_t *d, void *priv)
device_add_ex(const device_t *dev, void *priv)
{
device_add_common(d, d, priv, NULL, 0);
device_add_common(dev, dev, priv, NULL, 0);
}
void
device_add_ex_parameters(const device_t *d, void *priv, void *params)
device_add_ex_parameters(const device_t *dev, void *priv, void *params)
{
device_add_common(d, d, priv, params, 0);
device_add_common(dev, dev, priv, params, 0);
}
void *
device_add_inst(const device_t *d, int inst)
device_add_inst(const device_t *dev, int inst)
{
return device_add_common(d, d, NULL, NULL, inst);
return device_add_common(dev, dev, NULL, NULL, inst);
}
void *
device_add_inst_parameters(const device_t *d, int inst, void *params)
device_add_inst_parameters(const device_t *dev, int inst, void *params)
{
return device_add_common(d, d, NULL, params, inst);
return device_add_common(dev, dev, NULL, params, inst);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_add_inst_ex(const device_t *d, void *priv, int inst)
device_add_inst_ex(const device_t *dev, void *priv, int inst)
{
device_add_common(d, d, priv, NULL, inst);
device_add_common(dev, dev, priv, NULL, inst);
}
void
device_add_inst_ex_parameters(const device_t *d, void *priv, int inst, void *params)
device_add_inst_ex_parameters(const device_t *dev, void *priv, int inst, void *params)
{
device_add_common(d, d, priv, params, inst);
device_add_common(dev, dev, priv, params, inst);
}
/* These eight are to add a device with another device's context - will be
used to add machines' internal devices. */
void *
device_cadd(const device_t *d, const device_t *cd)
device_cadd(const device_t *dev, const device_t *cd)
{
return device_add_common(d, cd, NULL, NULL, 0);
return device_add_common(dev, cd, NULL, NULL, 0);
}
void *
device_cadd_parameters(const device_t *d, const device_t *cd, void *params)
device_cadd_parameters(const device_t *dev, const device_t *cd, void *params)
{
return device_add_common(d, cd, NULL, params, 0);
return device_add_common(dev, cd, NULL, params, 0);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_cadd_ex(const device_t *d, const device_t *cd, void *priv)
device_cadd_ex(const device_t *dev, const device_t *cd, void *priv)
{
device_add_common(d, cd, priv, NULL, 0);
device_add_common(dev, cd, priv, NULL, 0);
}
void
device_cadd_ex_parameters(const device_t *d, const device_t *cd, void *priv, void *params)
device_cadd_ex_parameters(const device_t *dev, const device_t *cd, void *priv, void *params)
{
device_add_common(d, cd, priv, params, 0);
device_add_common(dev, cd, priv, params, 0);
}
void *
device_cadd_inst(const device_t *d, const device_t *cd, int inst)
device_cadd_inst(const device_t *dev, const device_t *cd, int inst)
{
return device_add_common(d, cd, NULL, NULL, inst);
return device_add_common(dev, cd, NULL, NULL, inst);
}
void *
device_cadd_inst_parameters(const device_t *d, const device_t *cd, int inst, void *params)
device_cadd_inst_parameters(const device_t *dev, const device_t *cd, int inst, void *params)
{
return device_add_common(d, cd, NULL, params, inst);
return device_add_common(dev, cd, NULL, params, inst);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst)
device_cadd_inst_ex(const device_t *dev, const device_t *cd, void *priv, int inst)
{
device_add_common(d, cd, priv, NULL, inst);
device_add_common(dev, cd, priv, NULL, inst);
}
void
device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv, int inst, void *params)
device_cadd_inst_ex_parameters(const device_t *dev, const device_t *cd, void *priv, int inst, void *params)
{
device_add_common(d, cd, priv, params, inst);
device_add_common(dev, cd, priv, params, inst);
}
void
@@ -328,11 +328,11 @@ device_reset_all(uint32_t match_flags)
}
void *
device_get_priv(const device_t *d)
device_get_priv(const device_t *dev)
{
for (uint16_t c = 0; c < DEVICE_MAX; c++) {
if (devices[c] != NULL) {
if (devices[c] == d)
if (devices[c] == dev)
return (device_priv[c]);
}
}
@@ -341,15 +341,15 @@ device_get_priv(const device_t *d)
}
int
device_available(const device_t *d)
device_available(const device_t *dev)
{
device_config_t *config = NULL;
device_config_bios_t *bios = NULL;
int roms_present = 0;
int i = 0;
if (d != NULL) {
config = (device_config_t *) d->config;
if (dev != NULL) {
config = (device_config_t *) dev->config;
if (config != NULL) {
while (config->type != -1) {
if (config->type == CONFIG_BIOS) {
@@ -372,8 +372,8 @@ device_available(const device_t *d)
}
/* No CONFIG_BIOS field present, use the classic available(). */
if (d->available != NULL)
return (d->available());
if (dev->available != NULL)
return (dev->available());
else
return 1;
}
@@ -383,13 +383,13 @@ device_available(const device_t *d)
}
const char *
device_get_bios_file(const device_t *d, const char *internal_name, int file_no)
device_get_bios_file(const device_t *dev, const char *internal_name, int file_no)
{
device_config_t *config = NULL;
device_config_bios_t *bios = NULL;
if (d != NULL) {
config = (device_config_t *) d->config;
if (dev != NULL) {
config = (device_config_t *) dev->config;
if (config != NULL) {
while (config->type != -1) {
if (config->type == CONFIG_BIOS) {
@@ -416,18 +416,18 @@ device_get_bios_file(const device_t *d, const char *internal_name, int file_no)
}
int
device_has_config(const device_t *d)
device_has_config(const device_t *dev)
{
int c = 0;
device_config_t *config;
if (d == NULL)
if (dev == NULL)
return 0;
if (d->config == NULL)
if (dev->config == NULL)
return 0;
config = (device_config_t *) d->config;
config = (device_config_t *) dev->config;
while (config->type != -1) {
if (config->type != CONFIG_MAC)
@@ -439,11 +439,11 @@ device_has_config(const device_t *d)
}
int
device_poll(const device_t *d, int x, int y, int z, int b)
device_poll(const device_t *dev, int x, int y, int z, int b)
{
for (uint16_t c = 0; c < DEVICE_MAX; c++) {
if (devices[c] != NULL) {
if (devices[c] == d) {
if (devices[c] == dev) {
if (devices[c]->poll)
return (devices[c]->poll(x, y, z, b, 0, 0, device_priv[c]));
}
@@ -454,11 +454,11 @@ device_poll(const device_t *d, int x, int y, int z, int b)
}
void
device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd)
device_register_pci_slot(const device_t *dev, int device, int type, int inta, int intb, int intc, int intd)
{
for (uint16_t c = 0; c < DEVICE_MAX; c++) {
if (devices[c] != NULL) {
if (devices[c] == d) {
if (devices[c] == dev) {
if (devices[c]->register_pci_slot)
devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]);
return;
@@ -470,38 +470,38 @@ device_register_pci_slot(const device_t *d, int device, int type, int inta, int
}
void
device_get_name(const device_t *d, int bus, char *name)
device_get_name(const device_t *dev, int bus, char *name)
{
char *sbus = NULL;
char *fbus;
char *tname;
char pbus[8] = { 0 };
if (d == NULL)
if (dev == NULL)
return;
name[0] = 0x00;
if (bus) {
if (d->flags & DEVICE_ISA)
sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA";
else if (d->flags & DEVICE_CBUS)
if (dev->flags & DEVICE_ISA)
sbus = (dev->flags & DEVICE_AT) ? "ISA16" : "ISA";
else if (dev->flags & DEVICE_CBUS)
sbus = "C-BUS";
else if (d->flags & DEVICE_MCA)
else if (dev->flags & DEVICE_MCA)
sbus = "MCA";
else if (d->flags & DEVICE_EISA)
else if (dev->flags & DEVICE_EISA)
sbus = "EISA";
else if (d->flags & DEVICE_VLB)
else if (dev->flags & DEVICE_VLB)
sbus = "VLB";
else if (d->flags & DEVICE_PCI)
else if (dev->flags & DEVICE_PCI)
sbus = "PCI";
else if (d->flags & DEVICE_AGP)
else if (dev->flags & DEVICE_AGP)
sbus = "AGP";
else if (d->flags & DEVICE_AC97)
else if (dev->flags & DEVICE_AC97)
sbus = "AMR";
else if (d->flags & DEVICE_COM)
else if (dev->flags & DEVICE_COM)
sbus = "COM";
else if (d->flags & DEVICE_LPT)
else if (dev->flags & DEVICE_LPT)
sbus = "LPT";
if (sbus != NULL) {
@@ -515,7 +515,7 @@ device_get_name(const device_t *d, int bus, char *name)
sbus = "ISA";
else if (!strcmp(sbus, "COM") || !strcmp(sbus, "LPT")) {
sbus = NULL;
strcat(name, d->name);
strcat(name, dev->name);
return;
}
@@ -525,17 +525,17 @@ device_get_name(const device_t *d, int bus, char *name)
strcat(pbus, ")");
/* Allocate the temporary device name string and set it to all zeroes. */
tname = (char *) malloc(strlen(d->name) + 1);
memset(tname, 0x00, strlen(d->name) + 1);
tname = (char *) malloc(strlen(dev->name) + 1);
memset(tname, 0x00, strlen(dev->name) + 1);
/* First strip the bus string with parentheses. */
fbus = strstr(d->name, pbus);
if (fbus == d->name)
strcat(tname, d->name + strlen(pbus) + 1);
fbus = strstr(dev->name, pbus);
if (fbus == dev->name)
strcat(tname, dev->name + strlen(pbus) + 1);
else if (fbus == NULL)
strcat(tname, d->name);
strcat(tname, dev->name);
else {
strncat(tname, d->name, fbus - d->name - 1);
strncat(tname, dev->name, fbus - dev->name - 1);
strcat(tname, fbus + strlen(pbus));
}
@@ -556,9 +556,9 @@ device_get_name(const device_t *d, int bus, char *name)
free(tname);
tname = NULL;
} else
strcat(name, d->name);
strcat(name, dev->name);
} else
strcat(name, d->name);
strcat(name, dev->name);
}
void
@@ -771,7 +771,7 @@ device_is_valid(const device_t *device, int m)
if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP))
return 0;
if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2))
if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2_PORTS))
return 0;
if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97))

91
src/device/kbc_at.c
View File

@@ -81,7 +81,9 @@
#define KBC_VEN_ACER 0x20
#define KBC_VEN_NCR 0x24
#define KBC_VEN_ALI 0x28
#define KBC_VEN_MASK 0x3c
#define KBC_VEN_SIEMENS 0x2c
#define KBC_VEN_COMPAQ 0x30
#define KBC_VEN_MASK 0x7c
#define FLAG_CLOCK 0x01
#define FLAG_CACHE 0x02
@@ -747,6 +749,12 @@ write_p2(atkbc_t *dev, uint8_t val)
flushmmucache();
if (kbc_ven == KBC_VEN_ALI)
smbase = 0x00030000;
/* Yes, this is a hack, but until someone gets ahold of the real PCD-2L
and can find out what they actually did to make it boot from FFFFF0
correctly despite A20 being gated when the CPU is reset, this will
have to do. */
else if (kbc_ven == KBC_VEN_SIEMENS)
loadcs(0xF000);
}
}
}
@@ -974,6 +982,8 @@ write64_generic(void *priv, uint8_t val)
} else if (((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_GREEN))
/* (B0 or F0) | (0x08 or 0x0c) */
kbc_delay_to_ob(dev, ((dev->p1 | fixed_bits) & 0xf0) | (((dev->flags & KBC_VEN_MASK) == KBC_VEN_ACER) ? 0x08 : 0x0c), 0, 0x00);
else if (kbc_ven == KBC_VEN_COMPAQ)
kbc_delay_to_ob(dev, dev->p1 | (hasfpu ? 0x00 : 0x04), 0, 0x00);
else
/* (B0 or F0) | (0x04 or 0x44) */
kbc_delay_to_ob(dev, dev->p1 | fixed_bits, 0, 0x00);
@@ -1031,7 +1041,7 @@ write60_ami(void *priv, uint8_t val)
switch (dev->command) {
/* 0x40 - 0x5F are aliases for 0x60-0x7F */
case 0x40 ... 0x5f:
kbc_at_log("ATkbc: AMI - alias write to %08X\n", dev->command);
kbc_at_log("ATkbc: AMI - alias write to %02X\n", dev->command & 0x1f);
dev->mem[(dev->command & 0x1f) + 0x20] = val;
if (dev->command == 0x60)
write_cmd(dev, val);
@@ -1170,7 +1180,7 @@ write64_ami(void *priv, uint8_t val)
break;
case 0xaf: /* set extended controller RAM */
if (kbc_ven != KBC_VEN_ALI) {
if ((kbc_ven != KBC_VEN_SIEMENS) && (kbc_ven != KBC_VEN_ALI)) {
kbc_at_log("ATkbc: set extended controller RAM\n");
dev->wantdata = 1;
dev->state = STATE_KBC_PARAM;
@@ -1282,6 +1292,39 @@ write64_ami(void *priv, uint8_t val)
return write64_generic(dev, val);
}
static uint8_t
write64_siemens(void *priv, uint8_t val)
{
atkbc_t *dev = (atkbc_t *) priv;
switch (val) {
case 0x92: /*Siemens Award - 92 sent by PCD-2L BIOS*/
kbc_at_log("Siemens Award - 92 sent by PCD-2L BIOS\n");
return 0;
case 0x94: /*Siemens Award - 94 sent by PCD-2L BIOS*/
kbc_at_log("Siemens Award - 94 sent by PCD-2L BIOS\n");
return 0;
case 0x9a: /*Siemens Award - 9A sent by PCD-2L BIOS*/
kbc_at_log("Siemens Award - 9A sent by PCD-2L BIOS\n");
return 0;
case 0x9c: /*Siemens Award - 9C sent by PCD-2L BIOS*/
kbc_at_log("Siemens Award - 9C sent by PCD-2L BIOS\n");
return 0;
case 0xa9: /*Siemens Award - A9 sent by PCD-2L BIOS*/
kbc_at_log("Siemens Award - A9 sent by PCD-2L BIOS\n");
return 0;
default:
break;
}
return write64_ami(dev, val);
}
static uint8_t
write60_quadtel(void *priv, UNUSED(uint8_t val))
{
@@ -1729,13 +1772,15 @@ static void
kbc_at_write(uint16_t port, uint8_t val, void *priv)
{
atkbc_t *dev = (atkbc_t *) priv;
uint8_t kbc_ven = dev->flags & KBC_VEN_MASK;
uint8_t fast_a20 = (kbc_ven != KBC_VEN_SIEMENS);
kbc_at_log("ATkbc: [%04X:%08X] write(%04X) = %02X\n", CS, cpu_state.pc, port, val);
switch (port) {
case 0x60:
dev->status &= ~STAT_CD;
if (dev->wantdata && (dev->command == 0xd1)) {
if (fast_a20 && dev->wantdata && (dev->command == 0xd1)) {
kbc_at_log("ATkbc: write P2\n");
#if 0
@@ -1765,7 +1810,7 @@ kbc_at_write(uint16_t port, uint8_t val, void *priv)
case 0x64:
dev->status |= STAT_CD;
if (val == 0xd1) {
if (fast_a20 && (val == 0xd1)) {
kbc_at_log("ATkbc: write P2\n");
dev->wantdata = 1;
dev->state = STATE_KBC_PARAM;
@@ -1915,10 +1960,18 @@ kbc_at_init(const device_t *info)
kbc_award_revision = 0x42;
switch (dev->flags & KBC_VEN_MASK) {
case KBC_VEN_SIEMENS:
kbc_ami_revision = '8';
kbc_award_revision = 0x42;
dev->write60_ven = write60_ami;
dev->write64_ven = write64_siemens;
break;
case KBC_VEN_ACER:
case KBC_VEN_GENERIC:
case KBC_VEN_NCR:
case KBC_VEN_IBM_PS1:
case KBC_VEN_COMPAQ:
dev->write64_ven = write64_generic;
break;
@@ -2008,6 +2061,20 @@ const device_t keyboard_at_device = {
.config = NULL
};
const device_t keyboard_at_siemens_device = {
.name = "PC/AT Keyboard",
.internal_name = "keyboard_at",
.flags = DEVICE_KBC,
.local = KBC_TYPE_ISA | KBC_VEN_SIEMENS,
.init = kbc_at_init,
.close = kbc_at_close,
.reset = kbc_at_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t keyboard_at_ami_device = {
.name = "PC/AT Keyboard (AMI)",
.internal_name = "keyboard_at_ami",
@@ -2078,6 +2145,20 @@ const device_t keyboard_at_ncr_device = {
.config = NULL
};
const device_t keyboard_at_compaq_device = {
.name = "PC/AT Keyboard (Compaq)",
.internal_name = "keyboard_at_compaq",
.flags = DEVICE_KBC,
.local = KBC_TYPE_ISA | KBC_VEN_COMPAQ,
.init = kbc_at_init,
.close = kbc_at_close,
.reset = kbc_at_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t keyboard_ps2_device = {
.name = "PS/2 Keyboard",
.internal_name = "keyboard_ps2",

10
src/device/serial_passthrough.c
View File

@@ -119,6 +119,8 @@ static void
serial_passthrough_speed_changed(void *priv)
{
serial_passthrough_t *dev = (serial_passthrough_t *) priv;
if (!dev)
return;
timer_stop(&dev->host_to_serial_timer);
/* FIXME: do something to dev->baudrate */
@@ -132,9 +134,11 @@ static void
serial_passthrough_dev_close(void *priv)
{
serial_passthrough_t *dev = (serial_passthrough_t *) priv;
if (!dev)
return;
/* Detach passthrough device from COM port */
if (dev && dev->serial && dev->serial->sd)
if (dev->serial && dev->serial->sd)
memset(dev->serial->sd, 0, sizeof(serial_device_t));
plat_serpt_close(dev);
@@ -184,6 +188,10 @@ serial_passthrough_dev_init(const device_t *info)
/* Attach passthrough device to a COM port */
dev->serial = serial_attach_ex(dev->port, serial_passthrough_rcr_cb,
serial_passthrough_write, serial_passthrough_transmit_period, serial_passthrough_lcr_callback, dev);
if (!dev->serial) {
free(dev);
return NULL;
}
strncpy(dev->host_serial_path, device_get_config_string("host_serial_path"), 1023);
#ifdef _WIN32

8
src/disk/hdc_esdi_at.c
View File

@@ -70,7 +70,7 @@
#define CMD_SET_PARAMETERS 0x91
#define CMD_READ_PARAMETERS 0xec
typedef struct {
typedef struct drive_t {
int cfg_spt;
int cfg_hpc;
int current_cylinder;
@@ -81,7 +81,7 @@ typedef struct {
int hdd_num;
} drive_t;
typedef struct {
typedef struct esdi_t {
uint8_t status;
uint8_t error;
int secount;
@@ -821,9 +821,9 @@ loadhd(esdi_t *esdi, int hdd_num, int d, UNUSED(const char *fn))
}
static void
esdi_rom_write(uint32_t addr, uint8_t val, void *p)
esdi_rom_write(uint32_t addr, uint8_t val, void *priv)
{
rom_t *rom = (rom_t *) p;
rom_t *rom = (rom_t *) priv;
addr &= rom->mask;

5
src/disk/hdc_esdi_mca.c
View File

@@ -96,7 +96,8 @@
#define CMD_ADAPTER 0
typedef struct esdi_drive_t {
int spt, hpc;
int spt;
int hpc;
int tracks;
int sectors;
int present;
@@ -139,7 +140,7 @@ typedef struct esdi_t {
uint32_t rba;
struct {
struct cmds {
int req_in_progress;
} cmds[3];

25
src/disk/hdc_ide.c
View File

@@ -110,7 +110,7 @@
#define IDE_TIME 10.0
typedef struct {
typedef struct ide_board_t {
int bit32;
int cur_dev;
int irq;
@@ -123,7 +123,7 @@ typedef struct {
ide_t *ide[2];
} ide_board_t;
typedef struct {
typedef struct ide_bm_t {
int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv);
void (*set_irq)(int channel, void *priv);
void *priv;
@@ -244,6 +244,9 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x10:
period = (50.0 / 3.0);
break;
default:
break;
}
break;
case 0x100: /* Single Word DMA */
@@ -257,6 +260,9 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x04:
period = (25.0 / 3.0);
break;
default:
break;
}
break;
case 0x200: /* Multiword DMA */
@@ -270,6 +276,9 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x04:
period = (50.0 / 3.0);
break;
default:
break;
}
break;
case 0x300: /* Ultra DMA */
@@ -292,8 +301,14 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x20:
period = 100.0;
break;
default:
break;
}
break;
default:
break;
}
period = (1.0 / period); /* get us for 1 byte */
@@ -2576,6 +2591,9 @@ ide_callback(void *priv)
case 0xFF:
goto abort_cmd;
default:
break;
}
abort_cmd:
@@ -3043,6 +3061,9 @@ ide_init(const device_t *info)
if (info->local & 1)
ide_board_init(1, 15, 0x170, 0x376, info->local);
break;
default:
break;
}
return ide_drives;

2
src/disk/hdc_ide_cmd640.c
View File

@@ -37,7 +37,7 @@
#include <86box/zip.h>
#include <86box/mo.h>
typedef struct {
typedef struct cmd640_t {
uint8_t vlb_idx;
uint8_t id;
uint8_t in_cfg;

2
src/disk/hdc_ide_cmd646.c
View File

@@ -37,7 +37,7 @@
#include <86box/zip.h>
#include <86box/mo.h>
typedef struct {
typedef struct cmd646_t {
uint8_t vlb_idx;
uint8_t single_channel;
uint8_t in_cfg;

10
src/disk/hdc_ide_opti611.c
View File

@@ -30,11 +30,11 @@
#include <86box/hdc_ide.h>
#include <86box/plat_unused.h>
typedef struct
{
uint8_t tries,
in_cfg, cfg_locked,
regs[19];
typedef struct opti611_t {
uint8_t tries;
uint8_t in_cfg;
uint8_t cfg_locked;
uint8_t regs[19];
} opti611_t;
static void opti611_ide_handler(opti611_t *dev);

23
src/disk/hdc_ide_sff8038i.c
View File

@@ -462,29 +462,27 @@ sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base)
}
static void
sff_reset(void *p)
sff_reset(void *priv)
{
int i = 0;
#ifdef ENABLE_SFF_LOG
sff_log("SFF8038i: Reset\n");
#endif
for (i = 0; i < CDROM_NUM; i++) {
for (uint8_t i = 0; i < CDROM_NUM; i++) {
if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv)
scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv);
}
for (i = 0; i < ZIP_NUM; i++) {
for (uint8_t i = 0; i < ZIP_NUM; i++) {
if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv)
zip_reset((scsi_common_t *) zip_drives[i].priv);
}
for (i = 0; i < MO_NUM; i++) {
for (uint8_t i = 0; i < MO_NUM; i++) {
if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv)
mo_reset((scsi_common_t *) mo_drives[i].priv);
}
sff_bus_master_set_irq(0x00, p);
sff_bus_master_set_irq(0x01, p);
sff_bus_master_set_irq(0x00, priv);
sff_bus_master_set_irq(0x01, priv);
}
void
@@ -543,9 +541,9 @@ sff_set_irq_pin(sff8038i_t *dev, int irq_pin)
}
static void
sff_close(void *p)
sff_close(void *priv)
{
sff8038i_t *dev = (sff8038i_t *) p;
sff8038i_t *dev = (sff8038i_t *) priv;
free(dev);
@@ -554,9 +552,8 @@ sff_close(void *p)
next_id = 0;
}
static void
*
sff_init(UNUSED(const device_t *info))
static void *
sff_init(UNUSED(const device_t *info))
{
sff8038i_t *dev = (sff8038i_t *) malloc(sizeof(sff8038i_t));
memset(dev, 0, sizeof(sff8038i_t));

7
src/disk/hdc_st506_at.c
View File

@@ -74,7 +74,7 @@
#define CMD_DIAGNOSE 0x90
#define CMD_SET_PARAMETERS 0x91
typedef struct {
typedef struct drive_t {
int8_t present; /* drive is present */
int8_t hdd_num; /* drive number in system */
int8_t steprate; /* current servo step rate */
@@ -89,7 +89,7 @@ typedef struct {
int16_t curcyl; /* current track number */
} drive_t;
typedef struct {
typedef struct mfm_t {
uint8_t precomp; /* 1: precomp/error register */
uint8_t error;
uint8_t secount; /* 2: sector count register */
@@ -435,6 +435,9 @@ mfm_write(uint16_t port, uint8_t val, void *priv)
mfm->fdisk = val;
irq_update(mfm);
break;
default:
break;
}
}

69
src/disk/hdc_st506_xt.c
View File

@@ -229,7 +229,7 @@ enum {
STATE_DONE
};
typedef struct {
typedef struct drive_t {
int8_t present;
uint8_t hdd_num;
@@ -247,7 +247,7 @@ typedef struct {
uint16_t cfg_cyl;
} drive_t;
typedef struct {
typedef struct hdc_t {
uint8_t type; /* controller type */
uint8_t spt; /* sectors-per-track for controller */
@@ -290,7 +290,7 @@ typedef struct {
} hdc_t;
/* Supported drives table for the Xebec controller. */
typedef struct {
typedef struct hd_type_t {
uint16_t tracks;
uint8_t hpc;
uint8_t spt;
@@ -508,6 +508,9 @@ st506_callback(void *priv)
case STATE_DONE:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -534,6 +537,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -570,6 +576,9 @@ st506_callback(void *priv)
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
default:
break;
}
break;
@@ -602,6 +611,9 @@ st506_callback(void *priv)
timer_advance_u64(&dev->timer, ST506_TIME);
break;
default:
break;
}
break;
@@ -645,6 +657,9 @@ st506_callback(void *priv)
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
default:
break;
}
break;
@@ -737,6 +752,9 @@ st506_callback(void *priv)
}
dev->state = STATE_SEND_DATA;
break;
default:
break;
}
break;
@@ -832,6 +850,9 @@ st506_callback(void *priv)
}
dev->state = STATE_RECEIVE_DATA;
break;
default:
break;
}
break;
@@ -887,6 +908,9 @@ st506_callback(void *priv)
}
st506_complete(dev);
break;
default:
break;
}
break;
@@ -906,6 +930,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -946,6 +973,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -987,6 +1017,9 @@ st506_callback(void *priv)
case STATE_RECEIVED_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1008,6 +1041,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
else {
st506_error(dev, ERR_BAD_COMMAND);
@@ -1120,6 +1156,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1139,6 +1178,9 @@ st506_callback(void *priv)
/* FIXME: ignore the results. */
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1161,6 +1203,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1205,6 +1250,9 @@ st506_read(uint16_t port, void *priv)
timer_set_delay_u64(&dev->timer, ST506_TIME);
}
break;
default:
break;
}
break;
@@ -1217,6 +1265,9 @@ st506_read(uint16_t port, void *priv)
case 2: /* read option jumpers */
ret = dev->switches;
break;
default:
break;
}
st506_xt_log("ST506: read(%04x) = %02x\n", port, ret);
@@ -1257,6 +1308,9 @@ st506_write(uint16_t port, uint8_t val, void *priv)
timer_set_delay_u64(&dev->timer, ST506_TIME);
}
break;
default:
break;
}
break;
@@ -1282,6 +1336,9 @@ st506_write(uint16_t port, uint8_t val, void *priv)
picintc(1 << dev->irq);
}
break;
default:
break;
}
}
@@ -1561,6 +1618,9 @@ st506_init(const device_t *info)
case 19: /* v2.0 */
fn = ST11_BIOS_FILE_NEW;
break;
default:
break;
}
dev->base = device_get_config_hex16("base");
dev->irq = device_get_config_int("irq");
@@ -1665,6 +1725,9 @@ st506_init(const device_t *info)
dev->base = 0x01f0;
dev->switches = 0x0c;
break;
default:
break;
}
/* Load the ROM BIOS. */

46
src/disk/hdc_xta.c
View File

@@ -182,7 +182,7 @@ enum {
/* The device control block (6 bytes) */
#pragma pack(push, 1)
typedef struct {
typedef struct dcb_t {
uint8_t cmd; /* [7:5] class, [4:0] opcode */
uint8_t head : 5; /* [4:0] head number */
@@ -202,7 +202,7 @@ typedef struct {
/* The (configured) Drive Parameters. */
#pragma pack(push, 1)
typedef struct {
typedef struct dprm_t {
uint8_t cyl_high; /* (MSB) number of cylinders */
uint8_t cyl_low; /* (LSB) number of cylinders */
uint8_t heads; /* number of heads per cylinder */
@@ -215,7 +215,7 @@ typedef struct {
#pragma pack(pop)
/* Define an attached drive. */
typedef struct {
typedef struct drive_t {
int8_t id; /* drive ID on bus */
int8_t present; /* drive is present */
int8_t hdd_num; /* index to global disk table */
@@ -232,7 +232,7 @@ typedef struct {
uint16_t cfg_tracks;
} drive_t;
typedef struct {
typedef struct hdc_t {
const char *name; /* controller name */
uint16_t base; /* controller base I/O address */
@@ -436,6 +436,9 @@ do_fmt:
/* This saves us a LOT of code. */
goto do_fmt;
default:
break;
}
/* De-activate the status icon. */
@@ -497,6 +500,10 @@ hdc_callback(void *priv)
case STATE_SDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -606,6 +613,9 @@ do_send:
/* This saves us a LOT of code. */
dev->state = STATE_SEND;
goto do_send;
default:
break;
}
break;
@@ -710,6 +720,9 @@ do_recv:
/* This saves us a LOT of code. */
dev->state = STATE_RECV;
goto do_recv;
default:
break;
}
break;
@@ -758,6 +771,9 @@ do_recv:
dev->status &= ~STAT_REQ;
set_intr(dev);
break;
default:
break;
}
break;
@@ -802,6 +818,9 @@ do_recv:
dev->data, dev->buf_len);
set_intr(dev);
break;
default:
break;
}
break;
@@ -815,6 +834,9 @@ do_recv:
case STATE_RDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -834,6 +856,9 @@ do_recv:
case STATE_RDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -847,6 +872,9 @@ do_recv:
case STATE_RDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -900,6 +928,9 @@ hdc_read(uint16_t port, void *priv)
case 2: /* "read option jumpers" */
ret = 0xff; /* all switches off */
break;
default:
break;
}
return ret;
@@ -963,6 +994,9 @@ hdc_write(uint16_t port, uint8_t val, void *priv)
#endif
dev->intr = val;
break;
default:
break;
}
}
@@ -1000,12 +1034,16 @@ xta_init(const device_t *info)
dev->irq = 5;
dev->dma = 3;
break;
default:
break;
}
xta_log("%s: initializing (I/O=%04X, IRQ=%d, DMA=%d",
dev->name, dev->base, dev->irq, dev->dma);
if (dev->rom_addr != 0x000000)
xta_log(", BIOS=%06X", dev->rom_addr);
xta_log(")\n");
/* Load any disks for this device class. */

5
src/disk/hdc_xtide.c
View File

@@ -52,7 +52,7 @@
#define ROM_PATH_PS2AT "roms/hdd/xtide/ide_at_1_1_5.bin"
#define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin"
typedef struct {
typedef struct xtide_t {
void *ide_board;
uint8_t data_high;
rom_t bios_rom;
@@ -85,6 +85,9 @@ xtide_write(uint16_t port, uint8_t val, void *priv)
case 0xe:
ide_write_devctl(0x0, val, xtide->ide_board);
return;
default:
break;
}
}

4
src/disk/hdd.c
View File

@@ -107,8 +107,8 @@ hdd_bus_to_string(int bus, UNUSED(int cdrom))
char *s = "none";
switch (bus) {
case HDD_BUS_DISABLED:
default:
case HDD_BUS_DISABLED:
break;
case HDD_BUS_MFM:
@@ -165,7 +165,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_
fatal("hdd_seek_get_time(): hdd->num_zones < 0)\n");
return 0.0;
}
for (int i = 0; i < hdd->num_zones; i++) {
for (uint32_t i = 0; i < hdd->num_zones; i++) {
zone = &hdd->zones[i];
if (zone->end_sector >= dst_addr)
break;

3
src/disk/hdd_image.c
View File

@@ -40,8 +40,7 @@
#define HDD_IMAGE_HDX 2
#define HDD_IMAGE_VHD 3
typedef struct
{
typedef struct hdd_image_t {
FILE *file; /* Used for HDD_IMAGE_RAW, HDD_IMAGE_HDI, and HDD_IMAGE_HDX. */
MVHDMeta *vhd; /* Used for HDD_IMAGE_VHD. */
uint32_t base;

27
src/disk/mo.c
View File

@@ -498,6 +498,9 @@ mo_atapi_phase_to_scsi(mo_t *dev)
return 1;
case 3:
return 7;
default:
break;
}
} else {
if ((dev->phase & 3) == 3)
@@ -569,6 +572,9 @@ mo_mode_sense_read(mo_t *dev, uint8_t page_control, uint8_t page, uint8_t pos)
else
return mo_mode_sense_pages_default.pages[page][pos];
break;
default:
break;
}
return 0;
@@ -1419,6 +1425,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos);
break;
default:
break;
}
if (!dev->sector_len) {
@@ -1512,6 +1521,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
if ((dev->sector_pos >= dev->drv->medium_size) /* ||
@@ -1637,6 +1649,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case 3: /* Load the disk (close tray). */
mo_reload(dev->id);
break;
default:
break;
}
mo_command_complete(dev);
@@ -1744,6 +1759,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case GPCMD_SEEK_10:
pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
break;
default:
break;
}
mo_seek(dev, pos);
mo_command_complete(dev);
@@ -1782,6 +1800,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case GPCMD_ERASE_12:
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
break;
default:
break;
}
/*Erase all remaining sectors*/
@@ -1804,6 +1825,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case GPCMD_ERASE_12:
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
dev->sector_pos += previous_pos;
@@ -1958,6 +1982,9 @@ mo_phase_data_out(scsi_common_t *sc)
return 0;
}
break;
default:
break;
}
mo_command_stop((scsi_common_t *) dev);

30
src/disk/zip.c
View File

@@ -643,6 +643,9 @@ zip_atapi_phase_to_scsi(zip_t *dev)
return 1;
case 3:
return 7;
default:
break;
}
} else {
if ((dev->phase & 3) == 3)
@@ -713,13 +716,11 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos)
if (dev->drv->is_250 && (page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS))
return 0x60;
return dev->ms_pages_saved.pages[page][pos];
break;
case 1:
if (dev->drv->is_250)
return zip_250_mode_sense_pages_changeable.pages[page][pos];
else
return zip_mode_sense_pages_changeable.pages[page][pos];
break;
case 2:
if (dev->drv->is_250) {
if ((page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS))
@@ -734,6 +735,8 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos)
else
return zip_mode_sense_pages_default.pages[page][pos];
}
default:
break;
}
@@ -962,7 +965,7 @@ zip_data_command_finish(zip_t *dev, int len, int block_len, int alloc_len, int d
}
static void
zip_sense_clear(zip_t *dev, int command)
zip_sense_clear(zip_t *dev, UNUSED(int command))
{
zip_sense_key = zip_asc = zip_ascq = 0;
}
@@ -1116,7 +1119,7 @@ zip_data_phase_error(zip_t *dev)
}
static int
zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out)
zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out)
{
*len = 0;
@@ -1251,7 +1254,9 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb)
static void
zip_seek(zip_t *dev, uint32_t pos)
{
/* zip_log("ZIP %i: Seek %08X\n", dev->id, pos); */
#if 0
zip_log("ZIP %i: Seek %08X\n", dev->id, pos);
#endif
dev->sector_pos = pos;
}
@@ -1513,6 +1518,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
if (!dev->sector_len) {
@@ -1597,6 +1605,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
if ((dev->sector_pos >= dev->drv->medium_size) /* ||
@@ -1775,6 +1786,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
case 3: /* Load the disc (close tray). */
zip_reload(dev->id);
break;
default:
break;
}
zip_command_complete(dev);
@@ -1911,6 +1925,9 @@ atapi_out:
case GPCMD_SEEK_10:
pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
break;
default:
break;
}
zip_seek(dev, pos);
zip_command_complete(dev);
@@ -2177,6 +2194,9 @@ zip_phase_data_out(scsi_common_t *sc)
return 0;
}
break;
default:
break;
}
zip_command_stop((scsi_common_t *) dev);

79
src/dma.c
View File

@@ -31,6 +31,7 @@
#include <86box/io.h>
#include <86box/pic.h>
#include <86box/dma.h>
#include <86box/plat_unused.h>
dma_t dma[8];
uint8_t dma_e;
@@ -50,9 +51,9 @@ static uint16_t dma_sg_base;
static uint16_t dma16_buffer[65536];
static uint32_t dma_mask;
static struct {
int xfr_command,
xfr_channel;
static struct dma_ps2_t {
int xfr_command;
int xfr_channel;
int byte_ptr;
int is_ps2;
@@ -228,6 +229,9 @@ dma_sg_write(uint16_t port, uint8_t val, void *priv)
dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24);
dev->ptr %= (mem_size * 1024);
break;
default:
break;
}
}
@@ -258,6 +262,9 @@ dma_sg_writew(uint16_t port, uint16_t val, void *priv)
dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16);
dev->ptr %= (mem_size * 1024);
break;
default:
break;
}
}
@@ -284,6 +291,9 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv)
dev->ptr %= (mem_size * 1024);
dev->ptr0 = val & 0xff;
break;
default:
break;
}
}
@@ -325,6 +335,9 @@ dma_sg_read(uint16_t port, void *priv)
case 0x23:
ret = dev->ptr >> 24;
break;
default:
break;
}
dma_log("DMA S/G BYTE read : %04X %02X\n", port, ret);
@@ -356,6 +369,9 @@ dma_sg_readw(uint16_t port, void *priv)
case 0x22:
ret = dev->ptr >> 16;
break;
default:
break;
}
dma_log("DMA S/G WORD read : %04X %04X\n", port, ret);
@@ -384,6 +400,9 @@ dma_sg_readl(uint16_t port, void *priv)
case 0x20:
ret = dev->ptr0 | (dev->ptr & 0xffffff00);
break;
default:
break;
}
dma_log("DMA S/G DWORD read : %04X %08X\n", port, ret);
@@ -392,7 +411,7 @@ dma_sg_readl(uint16_t port, void *priv)
}
static void
dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv)
dma_ext_mode_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = (val & 0x03);
@@ -416,11 +435,14 @@ dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv)
case 0x03:
dma[channel].transfer_mode = 0x0102;
break;
default:
break;
}
}
static uint8_t
dma_sg_int_status_read(uint16_t addr, void *priv)
dma_sg_int_status_read(UNUSED(uint16_t addr), UNUSED(void *priv))
{
uint8_t ret = 0x00;
@@ -433,7 +455,7 @@ dma_sg_int_status_read(uint16_t addr, void *priv)
}
static uint8_t
dma_read(uint16_t addr, void *priv)
dma_read(uint16_t addr, UNUSED(void *priv))
{
int channel = (addr >> 1) & 3;
uint8_t temp;
@@ -468,13 +490,16 @@ dma_read(uint16_t addr, void *priv)
case 0xd: /*Temporary register*/
return 0;
default:
break;
}
return (dmaregs[0][addr & 0xf]);
}
static void
dma_write(uint16_t addr, uint8_t val, void *priv)
dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = (addr >> 1) & 3;
@@ -562,11 +587,14 @@ dma_write(uint16_t addr, uint8_t val, void *priv)
case 0xf: /*Mask write*/
dma_m = (dma_m & 0xf0) | (val & 0xf);
return;
default:
break;
}
}
static uint8_t
dma_ps2_read(uint16_t addr, void *priv)
dma_ps2_read(uint16_t addr, UNUSED(void *priv))
{
dma_t *dma_c = &dma[dma_ps2.xfr_channel];
uint8_t temp = 0xff;
@@ -589,6 +617,9 @@ dma_ps2_read(uint16_t addr, void *priv)
temp = (dma_c->ac >> 16) & 0xff;
dma_ps2.byte_ptr = 0;
break;
default:
break;
}
break;
@@ -626,12 +657,15 @@ dma_ps2_read(uint16_t addr, void *priv)
fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel);
}
break;
default:
break;
}
return temp;
}
static void
dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
dma_ps2_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
dma_t *dma_c = &dma[dma_ps2.xfr_channel];
uint8_t mode;
@@ -654,6 +688,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
if (!(dma_m & (1 << dma_ps2.xfr_channel)))
dma_ps2_run(dma_ps2.xfr_channel);
break;
default:
break;
}
break;
@@ -683,6 +720,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16);
dma_ps2.byte_ptr = 0;
break;
default:
break;
}
dma_c->ab = dma_c->ac;
break;
@@ -719,11 +759,14 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val);
}
break;
default:
break;
}
}
static uint8_t
dma16_read(uint16_t addr, void *priv)
dma16_read(uint16_t addr, UNUSED(void *priv))
{
int channel = ((addr >> 2) & 3) + 4;
uint8_t temp;
@@ -760,13 +803,16 @@ dma16_read(uint16_t addr, void *priv)
temp |= dma_stat >> 4;
dma_stat &= ~0xf0;
return temp;
default:
break;
}
return (dmaregs[1][addr & 0xf]);
}
static void
dma16_write(uint16_t addr, uint8_t val, void *priv)
dma16_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = ((addr >> 2) & 3) + 4;
addr >>= 1;
@@ -855,6 +901,9 @@ dma16_write(uint16_t addr, uint8_t val, void *priv)
case 0xf: /*Mask write*/
dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4);
return;
default:
break;
}
}
@@ -864,7 +913,7 @@ dma16_write(uint16_t addr, uint8_t val, void *priv)
}
static void
dma_page_write(uint16_t addr, uint8_t val, void *priv)
dma_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
@@ -897,7 +946,7 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv)
}
static uint8_t
dma_page_read(uint16_t addr, void *priv)
dma_page_read(uint16_t addr, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
uint8_t ret = 0xff;
@@ -917,7 +966,7 @@ dma_page_read(uint16_t addr, void *priv)
}
static void
dma_high_page_write(uint16_t addr, uint8_t val, void *priv)
dma_high_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
@@ -937,7 +986,7 @@ dma_high_page_write(uint16_t addr, uint8_t val, void *priv)
}
static uint8_t
dma_high_page_read(uint16_t addr, void *priv)
dma_high_page_read(uint16_t addr, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
uint8_t ret = 0xff;

42
src/floppy/fdc.c
View File

@@ -203,9 +203,9 @@ fdc_get_current_drive(void)
}
void
fdc_ctrl_reset(void *p)
fdc_ctrl_reset(void *priv)
{
fdc_t *fdc = (fdc_t *) p;
fdc_t *fdc = (fdc_t *) priv;
fdc->stat = 0x80;
fdc->pnum = fdc->ptot = 0;
@@ -227,8 +227,8 @@ int
fdc_get_compare_condition(fdc_t *fdc)
{
switch (fdc->interrupt) {
case 0x11:
default:
case 0x11:
return 0;
case 0x19:
return 1;
@@ -517,6 +517,9 @@ fdc_update_rate(fdc_t *fdc, int drive)
case 2:
fdc->bit_rate = 2000;
break;
default:
break;
}
break;
case 2: /*Double density*/
@@ -525,6 +528,9 @@ fdc_update_rate(fdc_t *fdc, int drive)
case 3: /*Extended density*/
fdc->bit_rate = 1000;
break;
default:
break;
}
fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/
@@ -544,8 +550,9 @@ fdc_get_bit_rate(fdc_t *fdc)
return 2;
case 1000:
return 3;
default:
return 2;
break;
}
return 2;
}
@@ -566,6 +573,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
return 0;
case 2:
return 1;
default:
break;
}
}
@@ -575,6 +585,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
return 1;
case 3:
return 0;
default:
break;
}
} else {
switch (fdc->densel_force) {
@@ -582,6 +595,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
return 0;
case 1:
return 1;
default:
break;
}
}
@@ -592,6 +608,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
case 1:
case 2:
return fdc->densel_polarity ? 0 : 1;
default:
break;
}
return 0;
@@ -1230,6 +1249,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->perp |= (fdc->params[0] & 0x03);
}
return;
default:
break;
}
} else
fdc->stat = 0x90 | (fdc->stat & 0xf);
@@ -1242,6 +1264,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
if (fdc->flags & FDC_FLAG_PS1)
fdc->noprec = !!(val & 0x04);
return;
default:
break;
}
}
@@ -1300,6 +1325,9 @@ fdc_read(uint16_t addr, void *priv)
case 3:
ret |= 0x61;
break;
default:
break;
}
} else {
if (is486 || !fdc->enable_3f1)
@@ -1684,6 +1712,9 @@ fdc_callback(void *priv)
fdc->stat = 0x90;
}
break;
default:
break;
}
fdc->inread = 1;
return;
@@ -1787,6 +1818,9 @@ fdc_callback(void *priv)
fdc->paramstogo = 1;
fdc->interrupt = 0;
return;
default:
break;
}
}

4
src/floppy/fdc_magitronic.c
View File

@@ -35,7 +35,7 @@
#define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define DRIVE_SELECT (int) (real_drive(dev->fdc_controller, i))
typedef struct {
typedef struct b215_t {
fdc_t *fdc_controller;
rom_t rom;
} b215_t;
@@ -58,7 +58,7 @@ b215_read(UNUSED(uint16_t addr), void *priv)
*/
int drive_spec[2];
for (int i = 0; i <= 1; i++) {
for (uint8_t i = 0; i <= 1; i++) {
if (fdd_is_525(DRIVE_SELECT)) {
if (!fdd_is_dd(DRIVE_SELECT))
drive_spec[i] = 1;

2
src/floppy/fdc_monster.c
View File

@@ -37,7 +37,7 @@
#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define ROM_MONSTER_FDC "roms/floppy/monster-fdc/floppy_bios.bin"
typedef struct {
typedef struct monster_fdc_t {
rom_t bios_rom;
fdc_t *fdc_pri;
fdc_t *fdc_sec;

2
src/floppy/fdc_pii15xb.c
View File

@@ -80,7 +80,7 @@ MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be.
#define ROM_PII_151B "roms/floppy/dtk/pii-151b.rom"
#define ROM_PII_158B "roms/floppy/dtk/pii-158b.rom"
typedef struct {
typedef struct pii_t {
rom_t bios_rom;
} pii_t;

72
src/floppy/fdd_86f.c
View File

@@ -125,30 +125,30 @@ enum {
FMT_POSTTRK_GAP4
};
typedef struct {
typedef struct sliding_buffer_t {
uint8_t buffer[10];
uint32_t pos;
uint32_t len;
} sliding_buffer_t;
typedef struct {
typedef struct find_t {
uint32_t bits_obtained;
uint16_t bytes_obtained;
uint16_t sync_marks;
uint32_t sync_pos;
} find_t;
typedef struct {
typedef struct split_byte_t {
unsigned nibble0 : 4;
unsigned nibble1 : 4;
} split_byte_t;
typedef union {
typedef union decoded_t {
uint8_t byte;
split_byte_t nibbles;
} decoded_t;
typedef struct {
typedef struct sector_t {
uint8_t c;
uint8_t h;
uint8_t r;
@@ -179,7 +179,7 @@ typedef struct {
* If bits 6, 5 are 0, and bit 7 is 1, the extra bitcell count
* specifies the entire bitcell count
*/
typedef struct {
typedef struct d86f_t {
FILE *f;
uint8_t state;
uint8_t fill;
@@ -369,43 +369,43 @@ d86f_index_hole_pos(int drive, int side)
}
uint32_t
null_index_hole_pos(int drive, int side)
null_index_hole_pos(UNUSED(int drive), UNUSED(int side))
{
return 0;
}
uint16_t
null_disk_flags(int drive)
null_disk_flags(UNUSED(int drive))
{
return 0x09;
}
uint16_t
null_side_flags(int drive)
null_side_flags(UNUSED(int drive))
{
return 0x0A;
}
void
null_writeback(int drive)
null_writeback(UNUSED(int drive))
{
return;
}
void
null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n)
null_set_sector(UNUSED(int drive), UNUSED(int side), UNUSED(uint8_t c), UNUSED(uint8_t h), UNUSED(uint8_t r), UNUSED(uint8_t n))
{
return;
}
void
null_write_data(int drive, int side, uint16_t pos, uint8_t data)
null_write_data(UNUSED(int drive), UNUSED(int side), UNUSED(uint16_t pos), UNUSED(uint8_t data))
{
return;
}
int
null_format_conditions(int drive)
null_format_conditions(UNUSED(int drive))
{
return 0;
}
@@ -419,7 +419,7 @@ d86f_extra_bit_cells(int drive, int side)
}
int32_t
null_extra_bit_cells(int drive, int side)
null_extra_bit_cells(UNUSED(int drive), UNUSED(int side))
{
return 0;
}
@@ -433,7 +433,7 @@ common_encoded_data(int drive, int side)
}
void
common_read_revolution(int drive)
common_read_revolution(UNUSED(int drive))
{
return;
}
@@ -637,9 +637,9 @@ d86f_get_array_size(int drive, int side, int words)
array_size = 0;
else
switch (hole) {
default:
case 0:
case 1:
default:
array_size = 12500;
switch (rm) {
case 1:
@@ -830,7 +830,7 @@ d86f_has_extra_bit_cells(int drive)
}
uint32_t
d86f_header_size(int drive)
d86f_header_size(UNUSED(int drive))
{
return 8;
}
@@ -902,15 +902,14 @@ d86f_wrong_densel(int drive)
is_3mode = 1;
switch (d86f_hole(drive)) {
case 0:
default:
case 0:
if (fdd_is_dd(drive))
return 0;
if (fdd_get_densel(drive))
return 1;
else
return 0;
break;
case 1:
if (fdd_is_dd(drive))
@@ -923,7 +922,6 @@ d86f_wrong_densel(int drive)
else
return 1;
}
break;
case 2:
if (fdd_is_dd(drive) || !fdd_is_ed(drive))
@@ -932,7 +930,6 @@ d86f_wrong_densel(int drive)
return 0;
else
return 1;
break;
}
}
@@ -983,6 +980,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b)
case 0xfc:
return result | d86f_encode_get_clock(0x01);
default:
break;
}
} else {
switch (b.byte) {
@@ -993,6 +993,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b)
case 0xfc:
return result | d86f_encode_get_clock(0xd7);
default:
break;
}
}
}
@@ -1040,6 +1043,9 @@ d86f_get_bitcell_period(int drive)
case 5:
rate = 2000.0;
break;
default:
break;
}
if (!mfm)
@@ -1194,7 +1200,7 @@ d86f_put_bit(int drive, int side, int bit)
}
static uint8_t
decodefm(int drive, uint16_t dat)
decodefm(UNUSED(int drive), uint16_t dat)
{
uint8_t temp = 0;
@@ -1542,6 +1548,9 @@ d86f_compare_byte(int drive, uint8_t received_byte, uint8_t disk_byte)
if ((received_byte >= disk_byte) || (received_byte == 0xFF))
dev->satisfying_bytes++;
break;
default:
break;
}
}
@@ -1850,7 +1859,7 @@ endian_swap(uint16_t word)
}
void
d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, int do_write)
d86f_format_finish(int drive, int side, int mfm, UNUSED(uint16_t sc), uint16_t gap_fill, int do_write)
{
d86f_t *dev = d86f[drive];
@@ -1871,7 +1880,7 @@ d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill,
}
void
d86f_format_turbo_finish(int drive, int side, int do_write)
d86f_format_turbo_finish(int drive, UNUSED(int side), int do_write)
{
d86f_t *dev = d86f[drive];
@@ -2071,13 +2080,14 @@ d86f_format_track(int drive, int side, int do_write)
/* Sector within allotted amount, change state to SECTOR_ID_SYNC. */
dev->format_state = FMT_SECTOR_ID_SYNC;
fdc_request_next_sector_id(d86f_fdc);
break;
} else {
dev->format_state = FMT_POSTTRK_GAP4;
dev->sector_count = 0;
break;
}
break;
default:
break;
}
}
}
@@ -2922,8 +2932,8 @@ d86f_read_track(int drive, int track, int thin_track, int side, uint16_t *da, ui
} else {
if (!thin_track) {
switch ((dev->disk_flags >> 1) & 3) {
case 0:
default:
case 0:
dev->side_flags[side] = 0x0A;
break;
@@ -3174,7 +3184,7 @@ d86f_stop(int drive)
}
int
d86f_common_command(int drive, int sector, int track, int side, int rate, int sector_size)
d86f_common_command(int drive, int sector, int track, int side, UNUSED(int rate), int sector_size)
{
d86f_t *dev = d86f[drive];
@@ -3258,7 +3268,7 @@ d86f_comparesector(int drive, int sector, int track, int side, int rate, int sec
}
void
d86f_readaddress(int drive, int side, int rate)
d86f_readaddress(int drive, UNUSED(int side), UNUSED(int rate))
{
d86f_t *dev = d86f[drive];
@@ -3308,7 +3318,7 @@ d86f_add_track(int drive, int track, int side)
}
void
d86f_common_format(int drive, int side, int rate, uint8_t fill, int proxy)
d86f_common_format(int drive, int side, UNUSED(int rate), uint8_t fill, int proxy)
{
d86f_t *dev = d86f[drive];
uint16_t temp;
@@ -3753,8 +3763,8 @@ d86f_load(int drive, char *fn)
}
} else {
switch ((dev->disk_flags >> 1) >> 3) {
case 0:
default:
case 0:
dev->side_flags[1] = 0x0a;
break;

9
src/game/gameport.c
View File

@@ -37,7 +37,7 @@
#include <86box/joystick_tm_fcs.h>
#include <86box/plat_unused.h>
typedef struct {
typedef struct g_axis_t {
pc_timer_t timer;
int axis_nr;
struct _joystick_instance_ *joystick;
@@ -116,9 +116,10 @@ static uint8_t gameport_pnp_rom[] = {
};
static const isapnp_device_config_t gameport_pnp_defaults[] = {
{.activate = 1,
.io = {
{ .base = 0x200 },
}}
.io = {
{ .base = 0x200 },
}
}
};
const device_t *standalone_gameport_type;

3
src/game/joystick_sw_pad.c
View File

@@ -67,8 +67,7 @@
#include <86box/joystick_sw_pad.h>
#include <86box/plat_unused.h>
typedef struct
{
typedef struct sw_data {
pc_timer_t poll_timer;
int poll_left;
int poll_clock;

6
src/include/86box/acpi.h
View File

@@ -59,8 +59,7 @@ extern "C" {
#define VEN_VIA 0x01106
#define VEN_VIA_596B 0x11106
typedef struct
{
typedef struct acpi_regs_t {
uint8_t acpitst;
uint8_t auxen;
uint8_t auxsts;
@@ -111,8 +110,7 @@ typedef struct
uint32_t pad0;
} acpi_regs_t;
typedef struct
{
typedef struct acpi_t {
acpi_regs_t regs;
uint8_t gpireg2_default;
uint8_t pad[3];

3
src/include/86box/apm.h
View File

@@ -21,8 +21,7 @@
extern "C" {
#endif
typedef struct
{
typedef struct apm_t {
uint8_t cmd;
uint8_t stat;
uint8_t do_smi;

6
src/include/86box/cdrom.h
View File

@@ -114,7 +114,7 @@ static const struct {
/* To shut up the GCC compilers. */
struct cdrom;
typedef struct {
typedef struct subchannel_t {
uint8_t attr;
uint8_t track;
uint8_t index;
@@ -126,7 +126,7 @@ typedef struct {
uint8_t rel_f;
} subchannel_t;
typedef struct {
typedef struct track_info_t {
int number;
uint8_t attr;
uint8_t m;
@@ -135,7 +135,7 @@ typedef struct {
} track_info_t;
/* Define the various CD-ROM drive operations (ops). */
typedef struct {
typedef struct cdrom_ops_t {
void (*get_tracks)(struct cdrom *dev, int *first, int *last);
void (*get_track_info)(struct cdrom *dev, uint32_t track, int end, track_info_t *ti);
void (*get_subchannel)(struct cdrom *dev, uint32_t lba, subchannel_t *subc);

4
src/include/86box/config.h
View File

@@ -27,7 +27,7 @@ extern "C" {
#endif
#if 0
typedef struct {
typedef struct storage_cfg_t {
uint8_t id;
uint8_t bus_type; /* Bus type: IDE, SCSI, etc. */
uint8_t bus, : 4; /* ID of the bus (for example, for IDE,
@@ -47,7 +47,7 @@ typedef struct {
uint32_t tracks;
} storage_cfg_t;
typedef struct {
typedef struct config_t {
/* General configuration */
int vid_resize; /* Window is resizable or not */
int vid_renderer; /* Renderer */

6
src/include/86box/ddma.h
View File

@@ -21,15 +21,13 @@
extern "C" {
#endif
typedef struct
{
typedef struct ddma_channel_t {
uint16_t io_base;
int channel;
int enable;
} ddma_channel_t;
typedef struct
{
typedef struct ddma_t {
ddma_channel_t channels[8];
} ddma_t;

10
src/include/86box/device.h
View File

@@ -86,12 +86,12 @@ enum {
#define BIOS_INTERLEAVED_INVERT 8
#define BIOS_HIGH_BIT_INVERT 16
typedef struct {
typedef struct device_config_selection_t {
const char *description;
int value;
} device_config_selection_t;
typedef struct {
typedef struct device_config_bios_t {
const char *name;
const char *internal_name;
int bios_type;
@@ -103,13 +103,13 @@ typedef struct {
const char *files[9];
} device_config_bios_t;
typedef struct {
typedef struct device_config_spinner_t {
int16_t min;
int16_t max;
int16_t step;
} device_config_spinner_t;
typedef struct {
typedef struct device_config_t {
const char *name;
const char *description;
int type;
@@ -144,7 +144,7 @@ typedef struct _device_ {
const device_config_t *config;
} device_t;
typedef struct {
typedef struct device_context_t {
const device_t *dev;
char name[2048];
int instance;

2
src/include/86box/disksizes.h
View File

@@ -22,7 +22,7 @@
extern "C" {
#endif
typedef struct {
typedef struct disk_size_t {
int hole;
int sides;
int data_rate;

2
src/include/86box/dma.h
View File

@@ -43,7 +43,7 @@
#define DMA_OVER 0x10000
#define DMA_VERIFY 0x20000
typedef struct {
typedef struct dma_t {
uint8_t m;
uint8_t mode;
uint8_t page;

2
src/include/86box/fdc.h
View File

@@ -56,7 +56,7 @@ extern int fdc_type;
#define FDC_FLAG_TER 0x2000 /* Is Tertiary */
#define FDC_FLAG_QUA 0x3000 /* Is Quaternary */
typedef struct {
typedef struct fdc_t {
uint8_t dor;
uint8_t stat;
uint8_t command;

2
src/include/86box/fdd.h
View File

@@ -65,7 +65,7 @@ extern int fdd_get_from_internal_name(char *s);
extern int fdd_current_track(int drive);
typedef struct {
typedef struct DRIVE {
int id;
void (*seek)(int drive, int track);

2
src/include/86box/fifo8.h
View File

@@ -1,7 +1,7 @@
#ifndef EMU_FIFO8_H
#define EMU_FIFO8_H
typedef struct {
typedef struct Fifo8 {
/* All fields are private */
uint8_t *data;
uint32_t capacity;

6
src/include/86box/gameport.h
View File

@@ -34,7 +34,7 @@
#define GAMEPORT_SIO 0x1000000
typedef struct {
typedef struct plat_joystick_t {
char name[260];
int a[8];
@@ -68,7 +68,7 @@ typedef struct {
int nr_sliders;
} plat_joystick_t;
typedef struct {
typedef struct joystick_t {
int axis[8];
int button[32];
int pov[4];
@@ -79,7 +79,7 @@ typedef struct {
int pov_mapping[4][2];
} joystick_t;
typedef struct {
typedef struct joystick_if_t {
const char *name;
const char *internal_name;

3
src/include/86box/hdc_ide_sff8038i.h
View File

@@ -20,8 +20,7 @@
#ifndef EMU_HDC_IDE_SFF8038I_H
#define EMU_HDC_IDE_SFF8038I_H
typedef struct
{
typedef struct sff8038i_t {
uint8_t command;
uint8_t status;
uint8_t ptr0;

10
src/include/86box/hdd.h
View File

@@ -87,7 +87,7 @@ enum {
#define HDD_MAX_ZONES 16
#define HDD_MAX_CACHE_SEG 16
typedef struct {
typedef struct hdd_preset_t {
const char *name;
const char *internal_name;
uint32_t zones;
@@ -101,7 +101,7 @@ typedef struct {
double track_seek_ms;
} hdd_preset_t;
typedef struct {
typedef struct hdd_cache_seg_t {
uint32_t id;
uint32_t lba_addr;
uint32_t ra_addr;
@@ -110,7 +110,7 @@ typedef struct {
uint8_t valid;
} hdd_cache_seg_t;
typedef struct {
typedef struct hdd_cache_t {
// Read cache
hdd_cache_seg_t segments[HDD_MAX_CACHE_SEG];
uint32_t num_segments;
@@ -126,7 +126,7 @@ typedef struct {
uint64_t write_start_time;
} hdd_cache_t;
typedef struct {
typedef struct hdd_zone_t {
uint32_t cylinders;
uint32_t sectors_per_track;
double sector_time_usec;
@@ -136,7 +136,7 @@ typedef struct {
} hdd_zone_t;
/* Define the virtual Hard Disk. */
typedef struct {
typedef struct hard_disk_t {
uint8_t id;
union {
uint8_t channel; /* Needed for Settings to reduce the number of if's */

12
src/include/86box/isapnp.h
View File

@@ -31,25 +31,25 @@ enum {
ISAPNP_CARD_NO_KEY = 3 /* cheat code for Crystal CS423x */
};
typedef struct {
typedef struct isapnp_device_config_t {
uint8_t activate;
struct {
struct pnp_mem_t {
uint32_t base : 24;
uint32_t size : 24;
} mem[4];
struct {
struct pnp_mem32_t {
uint32_t base;
uint32_t size;
} mem32[4];
struct {
struct pnp_io_t {
uint16_t base;
} io[8];
struct {
struct pnp_irq_t {
uint8_t irq : 4;
uint8_t level : 1;
uint8_t type : 1;
} irq[2];
struct {
struct pnp_dma_t {
uint8_t dma : 3;
} dma[2];
} isapnp_device_config_t;

8
src/include/86box/keyboard.h
View File

@@ -39,7 +39,7 @@ enum {
};
/* Used by the AT / PS/2 keyboard controller, common device, keyboard, and mouse. */
typedef struct {
typedef struct kbc_at_port_t {
uint8_t wantcmd;
uint8_t dat;
@@ -51,7 +51,7 @@ typedef struct {
} kbc_at_port_t;
/* Used by the AT / PS/2 common device, keyboard, and mouse. */
typedef struct {
typedef struct atkbc_dev_t {
const char *name; /* name of this device */
uint8_t type;
@@ -88,7 +88,7 @@ typedef struct {
kbc_at_port_t *port;
} atkbc_dev_t;
typedef struct {
typedef struct scancode {
const uint8_t mk[4];
const uint8_t brk[4];
} scancode;
@@ -228,11 +228,13 @@ extern const device_t keyboard_xt_olivetti_device;
extern const device_t keyboard_xt_zenith_device;
extern const device_t keyboard_xtclone_device;
extern const device_t keyboard_at_device;
extern const device_t keyboard_at_siemens_device;
extern const device_t keyboard_at_ami_device;
extern const device_t keyboard_at_tg_ami_device;
extern const device_t keyboard_at_toshiba_device;
extern const device_t keyboard_at_olivetti_device;
extern const device_t keyboard_at_ncr_device;
extern const device_t keyboard_at_compaq_device;
extern const device_t keyboard_ps2_device;
extern const device_t keyboard_ps2_ps1_device;
extern const device_t keyboard_ps2_ps1_pci_device;

3
src/include/86box/lpt.h
View File

@@ -17,8 +17,7 @@
#define LPT6_IRQ 5
#endif
typedef struct
{
typedef struct lpt_device_t {
const char *name;
const char *internal_name;

48
src/include/86box/machine.h
View File

@@ -30,14 +30,16 @@
#define MACHINE_BUS_CARTRIDGE 0x00000004 /* sys has two cartridge bays */
#define MACHINE_BUS_ISA16 0x00000008 /* sys has ISA16 bus - PC/AT architecture */
#define MACHINE_BUS_CBUS 0x00000010 /* sys has C-BUS bus */
#define MACHINE_BUS_PS2 0x00000020 /* system has PS/2 keyboard and mouse ports */
#define MACHINE_BUS_EISA 0x00000040 /* sys has EISA bus */
#define MACHINE_BUS_VLB 0x00000080 /* sys has VL bus */
#define MACHINE_BUS_MCA 0x00000100 /* sys has MCA bus */
#define MACHINE_BUS_PCI 0x00000200 /* sys has PCI bus */
#define MACHINE_BUS_PCMCIA 0x00000400 /* sys has PCMCIA bus */
#define MACHINE_BUS_AGP 0x00000800 /* sys has AGP bus */
#define MACHINE_BUS_AC97 0x00001000 /* sys has AC97 bus (ACR/AMR/CNR slot) */
#define MACHINE_BUS_PS2_LATCH 0x00000020 /* system has PS/2 keyboard controller IRQ latch */
#define MACHINE_BUS_PS2_PORTS 0x00000040 /* system has PS/2 keyboard and mouse ports */
#define MACHINE_BUS_PS2 (MACHINE_BUS_PS2_LATCH | MACHINE_BUS_PS2_PORTS)
#define MACHINE_BUS_EISA 0x00000080 /* sys has EISA bus */
#define MACHINE_BUS_VLB 0x00000100 /* sys has VL bus */
#define MACHINE_BUS_MCA 0x00000200 /* sys has MCA bus */
#define MACHINE_BUS_PCI 0x00000400 /* sys has PCI bus */
#define MACHINE_BUS_PCMCIA 0x00000800 /* sys has PCMCIA bus */
#define MACHINE_BUS_AGP 0x00001000 /* sys has AGP bus */
#define MACHINE_BUS_AC97 0x00002000 /* sys has AC97 bus (ACR/AMR/CNR slot) */
/* Aliases. */
#define MACHINE_CASSETTE (MACHINE_BUS_CASSETTE) /* sys has cassette port */
#define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */
@@ -98,19 +100,20 @@
#define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */
#define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */
/* Feature flags for internal storage controllers. */
#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */
#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */
#define MACHINE_XTA 0x00040000 /* sys has int XTA */
#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */
#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */
#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */
#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */
#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */
#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */
#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */
#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */
#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */
#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */
#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */
#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */
#define MACHINE_XTA 0x00040000 /* sys has int XTA */
#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */
#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */
#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */
#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */
#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */
#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */
#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */
#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */
#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */
#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */
#define MACHINE_SOFTFLOAT_ONLY 0x20000000 /* sys requires softfloat FPU */
/* Combined flags. */
#define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */
#define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */
@@ -541,9 +544,8 @@ extern int machine_at_cmdpc_init(const machine_t *);
extern int machine_at_portableii_init(const machine_t *);
extern int machine_at_portableiii_init(const machine_t *);
extern int machine_at_portableiii386_init(const machine_t *);
#if defined(DEV_BRANCH) && defined(USE_DESKPRO386)
extern int machine_at_deskpro386_init(const machine_t *);
#endif
extern int machine_at_deskpro386_01_1988_init(const machine_t *);
/* m_at_socket4.c */
extern void machine_at_premiere_common_init(const machine_t *, int);

8
src/include/86box/machine_status.h
View File

@@ -1,20 +1,20 @@
#ifndef EMU_MACHINE_STATUS_H
#define EMU_MACHINE_STATUS_H
typedef struct {
typedef struct dev_status_empty_active_t {
atomic_bool_t empty;
atomic_bool_t active;
} dev_status_empty_active_t;
typedef struct {
typedef struct dev_status_active_t {
atomic_bool_t active;
} dev_status_active_t;
typedef struct {
typedef struct dev_status_empty_t {
atomic_bool_t empty;
} dev_status_empty_t;
typedef struct {
typedef struct machine_status_t {
dev_status_empty_active_t fdd[FDD_NUM];
dev_status_empty_active_t cdrom[CDROM_NUM];
dev_status_empty_active_t zip[ZIP_NUM];

7
src/include/86box/mem.h
View File

@@ -158,20 +158,21 @@
#define mem_set_access_smram_bus(smm, base, size, is_smram) \
mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram)
typedef struct {
typedef struct state_t {
uint16_t x : 5;
uint16_t w : 5;
uint16_t r : 5;
uint16_t pad : 1;
} state_t;
typedef union {
typedef union mem_state_t {
uint16_t vals[4];
state_t states[4];
} mem_state_t;
typedef struct _mem_mapping_ {
struct _mem_mapping_ *prev, *next;
struct _mem_mapping_ *prev;
struct _mem_mapping_ *next;
int enable;

9
src/include/86box/mo.h
View File

@@ -27,7 +27,7 @@
#define MO_TIME 10.0
typedef struct {
typedef struct mo_type_t {
uint32_t sectors;
uint16_t bytes_per_sector;
} mo_type_t;
@@ -48,8 +48,7 @@ static const mo_type_t mo_types[KNOWN_MO_TYPES] = {
{ 637041, 1024},
};
typedef struct
{
typedef struct mo_drive_type_t {
const char vendor[9];
const char model[16];
const char revision[5];
@@ -89,7 +88,7 @@ enum {
MO_BUS_USB = 7
};
typedef struct {
typedef struct mo_drive_t {
uint8_t id;
union {
@@ -121,7 +120,7 @@ typedef struct {
} mo_drive_t;
typedef struct {
typedef struct mo_t {
mode_sense_pages_t ms_pages_saved;
mo_drive_t *drv;

2
src/include/86box/net_dp8390.h
View File

@@ -36,7 +36,7 @@
#define DP8390_FLAG_CHECK_CR 0x02
#define DP8390_FLAG_CLEAR_IRQ 0x04
typedef struct {
typedef struct dp8390_t {
/* Page 0 */
/* Command Register - 00h read/write */

2
src/include/86box/net_event.h
View File

@@ -1,7 +1,7 @@
#ifndef EMU_NET_EVENT_H
#define EMU_NET_EVENT_H
typedef struct {
typedef struct net_evt_t {
#ifdef _WIN32
HANDLE handle;
#else

4
src/include/86box/network.h
View File

@@ -93,7 +93,7 @@ enum {
NET_QUEUE_TX_HOST = 2
};
typedef struct {
typedef struct netcard_conf_t {
uint16_t device_num;
int net_type;
char host_dev_name[128];
@@ -111,7 +111,7 @@ typedef struct netpkt {
int len;
} netpkt_t;
typedef struct {
typedef struct netqueue_t {
netpkt_t packets[NET_QUEUE_LEN];
int head;
int tail;

19
src/include/86box/pci.h
View File

@@ -91,13 +91,30 @@ enum {
typedef union {
uint32_t addr;
uint8_t addr_regs[4];
uint8_t addr_regs[4];
} bar_t;
#define PCI_IO_ON 0x01
#define PCI_IO_DEV0 0x02
extern int pci_burst_time;
extern int agp_burst_time;
extern int pci_nonburst_time;
extern int agp_nonburst_time;
extern int pci_take_over_io;
extern uint32_t pci_base;
extern uint32_t pci_size;
extern void pci_type2_write(uint16_t port, uint8_t val, void *priv);
extern void pci_type2_writew(uint16_t port, uint16_t val, void *priv);
extern void pci_type2_writel(uint16_t port, uint32_t val, void *priv);
extern uint8_t pci_type2_read(uint16_t port, void *priv);
extern uint16_t pci_type2_readw(uint16_t port, void *priv);
extern uint32_t pci_type2_readl(uint16_t port, void *priv);
extern void pci_set_irq_routing(int pci_int, int irq);
extern void pci_set_irq_level(int pci_int, int level);

16
src/include/86box/pit.h
View File

@@ -19,7 +19,7 @@
#ifndef EMU_PIT_H
#define EMU_PIT_H
typedef struct {
typedef struct ctr_t {
uint8_t m;
uint8_t ctrl;
uint8_t read_status;
@@ -44,13 +44,13 @@ typedef struct {
int do_read_status;
union {
int count;
int32_t count;
struct {
int units : 4;
int tens : 4;
int hundreds : 4;
int thousands : 4;
int myriads : 4;
int32_t units : 4;
int32_t tens : 4;
int32_t hundreds : 4;
int32_t thousands : 4;
int32_t myriads : 4;
};
};
@@ -77,7 +77,7 @@ enum {
PIT_8254_FAST = 3
};
typedef struct {
typedef struct pit_intf_t {
uint8_t (*read)(uint16_t addr, void *priv);
void (*write)(uint16_t addr, uint8_t val, void *priv);
/* Gets a counter's count. */

16
src/include/86box/pit_fast.h
View File

@@ -19,7 +19,7 @@
#ifndef EMU_PIT_FAST_H
#define EMU_PIT_FAST_H
typedef struct {
typedef struct ctrf_t {
uint8_t m;
uint8_t ctrl;
uint8_t read_status;
@@ -45,13 +45,13 @@ typedef struct {
int rereadlatch;
union {
int count;
int32_t count;
struct {
int units : 4;
int tens : 4;
int hundreds : 4;
int thousands : 4;
int myriads : 4;
int32_t units : 4;
int32_t tens : 4;
int32_t hundreds : 4;
int32_t thousands : 4;
int32_t myriads : 4;
};
};
@@ -62,7 +62,7 @@ typedef struct {
void (*out_func)(int new_out, int old_out);
} ctrf_t;
typedef struct {
typedef struct pitf_t {
int flags;
ctrf_t counters[3];

2
src/include/86box/plat_dir.h
View File

@@ -39,7 +39,7 @@ struct dirent {
};
# define d_namlen d_reclen
typedef struct {
typedef struct DIR_t {
short flags; /* internal flags */
short offset; /* offset of entry into dir */
long handle; /* open handle to Win32 system */

2
src/include/86box/plat_dynld.h
View File

@@ -18,7 +18,7 @@
#ifndef PLAT_DYNLD_H
#define PLAT_DYNLD_H
typedef struct {
typedef struct dllimp_t {
const char *name;
void *func;
} dllimp_t;

3
src/include/86box/port_6x.h
View File

@@ -20,8 +20,7 @@
#define EMU_PORT_6X_H
#ifdef _TIMER_H_
typedef struct
{
typedef struct port_6x_t {
uint8_t refresh;
uint8_t flags;

3
src/include/86box/port_92.h
View File

@@ -20,8 +20,7 @@
#define EMU_PORT_92_H
#ifdef _TIMER_H_
typedef struct
{
typedef struct port_92_t {
uint8_t reg;
uint8_t flags;

Some files were not shown because too many files have changed in this diff Show More