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Merge pull request #3 from 86Box/master

Browse Source 
rebase to master
This commit is contained in:
Akamaki
2025-02-22 09:42:26 +09:00
committed by GitHub
parent ed555c86d7 ce906664a5
commit fea5b622d2
20 changed files with 349 additions and 106 deletions
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2
src/device.c
View File

@@ -490,7 +490,7 @@ device_get_name(const device_t *dev, int bus, char *name)
const char *sbus = NULL;
const char *fbus;
char *tname;
char pbus[12] = { 0 };
char pbus[16] = { 0 };
if (dev == NULL)
return;

3
src/device/keyboard.c
View File

@@ -85,6 +85,8 @@ typedef struct {
const uint8_t brk[4];
} scconvtbl;
/* Is this a left-over of something planned earlier? */
#ifdef USE_SCCONV55_82
static scconvtbl scconv55_82[18 + 1] =
{
// clang-format off
@@ -109,6 +111,7 @@ static scconvtbl scconv55_82[18 + 1] =
{.sc = 0 , .mk = { 0 }, .brk = { 0 } } /* end */
// clang-format on
};
#endif
static scconvtbl scconv55_8a[18 + 1] =
{

1
src/disk/mo.c
View File

@@ -1461,6 +1461,7 @@ mo_command(scsi_common_t *sc, const uint8_t *cdb)
break;
case GPCMD_WRITE_SAME_10:
mo_set_phase(dev, SCSI_PHASE_DATA_OUT);
alloc_length = 512;
if ((cdb[1] & 6) == 6)

1
src/disk/zip.c
View File

@@ -1506,6 +1506,7 @@ zip_command(scsi_common_t *sc, const uint8_t *cdb)
break;
case GPCMD_WRITE_SAME_10:
zip_set_phase(dev, SCSI_PHASE_DATA_OUT);
alloc_length = 512;
if ((cdb[1] & 6) == 6)

2
src/include/86box/machine.h
View File

@@ -903,7 +903,7 @@ extern int machine_ps2_model_70_type3_init(const machine_t *);
extern int machine_ps2_model_80_init(const machine_t *);
extern int machine_ps2_model_80_axx_init(const machine_t *);
extern int machine_ps2_model_70_type4_init(const machine_t *);
extern int machine_ps55_model_50t_init(const machine_t*);;
extern int machine_ps55_model_50t_init(const machine_t*);
extern int machine_ps55_model_50v_init(const machine_t*);
/* m_tandy.c */

12
src/include/86box/network.h
View File

@@ -57,7 +57,7 @@
/* Queue size must be a power of 2 */
#define NET_QUEUE_LEN 16
#define NET_QUEUE_LEN_MASK (NET_QUEUE_LEN - 1)
#define NET_QUEUE_COUNT 3
#define NET_QUEUE_COUNT 4
#define NET_CARD_MAX 4
#define NET_HOST_INTF_MAX 64
@@ -84,9 +84,10 @@ enum {
};
enum {
NET_QUEUE_RX = 0,
NET_QUEUE_TX_VM = 1,
NET_QUEUE_TX_HOST = 2
NET_QUEUE_RX = 0,
NET_QUEUE_TX_VM = 1,
NET_QUEUE_TX_HOST = 2,
NET_QUEUE_RX_ON_TX = 3
};
typedef struct netcard_conf_t {
@@ -199,7 +200,10 @@ extern const device_t *network_card_getdevice(int);
extern int network_tx_pop(netcard_t *card, netpkt_t *out_pkt);
extern int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size);
extern int network_rx_put(netcard_t *card, uint8_t *bufp, int len);
extern int network_rx_on_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size);
extern int network_rx_on_tx_put(netcard_t *card, uint8_t *bufp, int len);
extern int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt);
extern int network_rx_on_tx_put_pkt(netcard_t *card, netpkt_t *pkt);
#ifdef EMU_DEVICE_H
/* 3Com Etherlink */

1
src/include/86box/vid_voodoo_banshee.h
View File

@@ -18,6 +18,7 @@
#ifndef VIDEO_VOODOO_BANSHEE_H
#define VIDEO_VOODOO_BANSHEE_H
void banshee_cmd_write(void *priv, uint32_t addr, uint32_t val);
void banshee_set_overlay_addr(void *priv, uint32_t addr);
#endif /*VIDEO_VOODOO_BANSHEE_H*/

2
src/include/86box/vid_voodoo_common.h
View File

@@ -420,6 +420,7 @@ typedef struct voodoo_t {
int cmdfifo_rp;
int cmdfifo_ret_addr;
int cmdfifo_in_sub;
int cmdfifo_in_agp;
atomic_int cmdfifo_depth_rd;
atomic_int cmdfifo_depth_wr;
atomic_int cmdfifo_enabled;
@@ -433,6 +434,7 @@ typedef struct voodoo_t {
int cmdfifo_rp_2;
int cmdfifo_ret_addr_2;
int cmdfifo_in_sub_2;
int cmdfifo_in_agp_2;
atomic_int cmdfifo_depth_rd_2;
atomic_int cmdfifo_depth_wr_2;
atomic_int cmdfifo_enabled_2;

28
src/machine/m_ps1.c
View File

@@ -320,30 +320,28 @@ ps1_setup(int model)
mem_remap_top(384);
device_add(&ps_nvr_device);
device_add(&fdc_ps2_device);
if (model == 2011) {
if (!strcmp("english_us", device_get_config_bios("bios_language"))) {
/* US English */
rom_init(&ps->high_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 0),
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
const device_t *d = device_context_get_device();
const char * bios = device_get_config_bios("bios_language");
const char * first = device_get_bios_file(d, bios, 0);
const char * second = device_get_bios_file(d, bios, 1);
} else if ((device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 1)) == NULL) {
if (!strcmp(bios, "english_us")) {
/* US English */
rom_init(&ps->high_rom, first,
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
} else if (second == NULL) {
/* Combined ROM. */
rom_init(&ps->high_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 0),
rom_init(&ps->high_rom, first,
0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL);
} else {
/* Split ROM. */
rom_init(&ps->mid_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 0),
rom_init(&ps->mid_rom, first,
0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&ps->high_rom,
device_get_bios_file(device_context_get_device(), device_get_config_bios("bios_language"), 1),
rom_init(&ps->high_rom, second,
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
}
@@ -381,6 +379,8 @@ ps1_setup(int model)
device_add(&ps1snd_device);
}
device_add(&ps_nvr_device);
}
static void

8
src/machine/m_ps2_mca.c
View File

@@ -375,7 +375,7 @@ ps55_model_50t_read(uint16_t port)
return ps2.planar_id >> 8;
case 0x102:
return ps2.option[0];
case 0x103:
case 0x103: {
uint8_t val = 0xff;
/*
I/O 103h - Bit 7-4: Memory Card ID (Connector 1 or 3)
@@ -413,7 +413,7 @@ ps55_model_50t_read(uint16_t port)
}
ps2_mca_log(" Read MCA %04X %02X %04X:%04X mem_size = %d, ps2option1 = %2X\n", port, val, cs >> 4, cpu_state.pc, mem_size, ps2.option[1]);
return val;
case 0x104:
} case 0x104:
return ps2.option[2];
case 0x105:
return ps2.option[3];
@@ -435,7 +435,7 @@ ps55_model_50v_read(uint16_t port)
return ps2.planar_id >> 8;
case 0x102:
return ps2.option[0];
case 0x103:
case 0x103: {
uint8_t val = 0xff;
/*
I/O 103h - Bit 7-4: Reserved
@@ -460,7 +460,7 @@ ps55_model_50v_read(uint16_t port)
break;
}
return val;
case 0x104:
} case 0x104:
/* Reading cache ID (bit 3-2) always returns zero */
return ps2.option[2] & 0xf3;
case 0x105:

2
src/machine/machine_table.c
View File

@@ -324,7 +324,7 @@ const machine_t machines[] = {
.max_multi = 0
},
.bus_flags = MACHINE_PCJR,
.flags = MACHINE_VIDEO_FIXED,
.flags = MACHINE_VIDEO_FIXED | MACHINE_CARTRIDGE,
.ram = {
.min = 64,
.max = 640,

60
src/network/net_slirp.c
View File

@@ -60,16 +60,19 @@ enum {
};
typedef struct net_slirp_t {
Slirp *slirp;
uint8_t mac_addr[6];
netcard_t *card; /* netcard attached to us */
thread_t *poll_tid;
net_evt_t tx_event;
net_evt_t stop_event;
netpkt_t pkt;
netpkt_t pkt_tx_v[SLIRP_PKT_BATCH];
Slirp * slirp;
uint8_t mac_addr[6];
netcard_t * card; /* netcard attached to us */
thread_t * poll_tid;
net_evt_t rx_event;
net_evt_t tx_event;
net_evt_t stop_event;
netpkt_t pkt;
netpkt_t pkt_tx_v[SLIRP_PKT_BATCH];
int during_tx;
int recv_on_tx;
#ifdef _WIN32
HANDLE sock_event;
HANDLE sock_event;
#else
uint32_t pfd_len;
uint32_t pfd_size;
@@ -184,7 +187,11 @@ net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque)
memcpy(slirp->pkt.data, (uint8_t *) qp, pkt_len);
slirp->pkt.len = pkt_len;
network_rx_put_pkt(slirp->card, &slirp->pkt);
if (slirp->during_tx) {
network_rx_on_tx_put_pkt(slirp->card, &slirp->pkt);
slirp->recv_on_tx = 1;
} else
network_rx_put_pkt(slirp->card, &slirp->pkt);
return pkt_len;
}
@@ -324,6 +331,21 @@ net_slirp_in_available(void *priv)
net_event_set(&slirp->tx_event);
}
static void
net_slirp_rx_deferred_packets(net_slirp_t *slirp)
{
int packets = 0;
if (slirp->recv_on_tx) {
do {
packets = network_rx_on_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH);
for (int i = 0; i < packets; i++)
network_rx_put_pkt(slirp->card, &(slirp->pkt_tx_v[i]));
} while (packets > 0);
slirp->recv_on_tx = 0;
}
}
#ifdef _WIN32
static void
net_slirp_thread(void *priv)
@@ -352,10 +374,13 @@ net_slirp_thread(void *priv)
case NET_EVENT_TX:
{
slirp->during_tx = 1;
int packets = network_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH);
for (int i = 0; i < packets; i++) {
for (int i = 0; i < packets; i++)
net_slirp_in(slirp, slirp->pkt_tx_v[i].data, slirp->pkt_tx_v[i].len);
}
slirp->during_tx = 0;
net_slirp_rx_deferred_packets(slirp);
}
break;
@@ -398,10 +423,13 @@ net_slirp_thread(void *priv)
if (slirp->pfd[NET_EVENT_TX].revents & POLLIN) {
net_event_clear(&slirp->tx_event);
slirp->during_tx = 1;
int packets = network_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH);
for (int i = 0; i < packets; i++) {
for (int i = 0; i < packets; i++)
net_slirp_in(slirp, slirp->pkt_tx_v[i].data, slirp->pkt_tx_v[i].len);
}
slirp->during_tx = 0;
net_slirp_rx_deferred_packets(slirp);
}
}
@@ -477,6 +505,7 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, UNUSED(void *priv
slirp->pkt_tx_v[i].data = calloc(1, NET_MAX_FRAME);
}
slirp->pkt.data = calloc(1, NET_MAX_FRAME);
net_event_init(&slirp->rx_event);
net_event_init(&slirp->tx_event);
net_event_init(&slirp->stop_event);
#ifdef _WIN32
@@ -531,8 +560,9 @@ net_slirp_close(void *priv)
slirp_log("SLiRP: waiting for thread to end...\n");
thread_wait(slirp->poll_tid);
net_event_close(&slirp->tx_event);
net_event_close(&slirp->stop_event);
net_event_close(&slirp->tx_event);
net_event_close(&slirp->rx_event);
slirp_cleanup(slirp->slirp);
for (int i = 0; i < SLIRP_PKT_BATCH; i++) {
free(slirp->pkt_tx_v[i].data);

37
src/network/network.c
View File

@@ -643,6 +643,43 @@ network_rx_put(netcard_t *card, uint8_t *bufp, int len)
return ret;
}
int
network_rx_on_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size)
{
int pkt_count = 0;
netqueue_t *queue = &card->queues[NET_QUEUE_RX_ON_TX];
for (int i = 0; i < vec_size; i++) {
if (!network_queue_get_swap(queue, pkt_vec))
break;
network_dump_packet(pkt_vec);
pkt_count++;
pkt_vec++;
}
return pkt_count;
}
int
network_rx_on_tx_put(netcard_t *card, uint8_t *bufp, int len)
{
int ret = 0;
ret = network_queue_put(&card->queues[NET_QUEUE_RX_ON_TX], bufp, len);
return ret;
}
int
network_rx_on_tx_put_pkt(netcard_t *card, netpkt_t *pkt)
{
int ret = 0;
ret = network_queue_put_swap(&card->queues[NET_QUEUE_RX_ON_TX], pkt);
return ret;
}
int
network_rx_put_pkt(netcard_t *card, netpkt_t *pkt)
{

46
src/scsi/scsi_spock.c
View File

@@ -196,6 +196,7 @@ typedef struct {
#define CMD_UNKNOWN_1C11 0x1c11
#define CMD_WRITE_DATA 0x1c02
#define CMD_VERIFY 0x1c03
#define CMD_WRITE_VERIFY 0x1c04
#define IRQ_TYPE_NONE 0x0
#define IRQ_TYPE_SCB_COMPLETE 0x1
@@ -291,7 +292,7 @@ spock_write(uint16_t port, uint8_t val, void *priv)
{
spock_t *scsi = (spock_t *) priv;
spock_log("spock_write: port=%04x val=%02x %04x:%04x\n", port, val, CS, cpu_state.pc);
spock_log("spock_writeb: port=%04x, val=%02x, %04x:%04x.\n", port & 7, val, CS, cpu_state.pc);
switch (port & 7) {
case 0:
@@ -332,6 +333,8 @@ spock_writew(uint16_t port, uint16_t val, void *priv)
{
spock_t *scsi = (spock_t *) priv;
spock_log("spock_writew: port=%04x, val=%04x, %04x:%04x.\n", port & 7, val, CS, cpu_state.pc);
switch (port & 7) {
case 0: /*Command Interface Register*/
scsi->cir_pending[0] = val & 0xff;
@@ -347,8 +350,6 @@ spock_writew(uint16_t port, uint16_t val, void *priv)
default:
break;
}
spock_log("spock_writew: port=%04x val=%04x\n", port, val);
}
static uint8_t
@@ -390,7 +391,7 @@ spock_read(uint16_t port, void *priv)
break;
}
spock_log("spock_read: port=%04x val=%02x %04x(%05x):%04x.\n", port, temp, CS, cs, cpu_state.pc);
spock_log("spock_readb: port=%04x, val=%02x, %04x:%04x.\n", port & 7, temp, CS, cpu_state.pc);
return temp;
}
@@ -412,7 +413,7 @@ spock_readw(uint16_t port, void *priv)
break;
}
spock_log("spock_readw: port=%04x val=%04x\n", port, temp);
spock_log("spock_readw: port=%04x, val=%04x, %04x:%04x.\n", port & 7, temp, CS, cpu_state.pc);
return temp;
}
@@ -534,7 +535,7 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb)
int old_scb_state;
if (scsi->in_reset) {
spock_log("Reset type = %d\n", scsi->in_reset);
spock_log("Reset type=%d\n", scsi->in_reset);
scsi->status &= ~STATUS_BUSY;
scsi->irq_status = 0;
@@ -542,9 +543,8 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb)
for (c = 0; c < SCSI_ID_MAX; c++)
spock_clear_irq(scsi, c);
if (scsi->in_reset == 1) {
if (scsi->in_reset == 1)
scsi->basic_ctrl |= CTRL_IRQ_ENA;
}
spock_set_irq(scsi, 0x0f, IRQ_TYPE_RESET_COMPLETE);
@@ -585,6 +585,7 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb)
switch (scsi->scb_state) {
case 0: /* Idle */
spock_log("Start Idle.\n");
break;
case 1: /* Select */
@@ -820,6 +821,28 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb)
scsi->scb_state = 2;
return;
case CMD_WRITE_VERIFY:
if (scsi->present[scsi->scb_id] != 0xff)
scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id;
else
scsi->cdb_id = 0xff;
spock_log("Device Write with Verify\n");
scsi->cdb[0] = GPCMD_WRITE_AND_VERIFY_10;
scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/
scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/
scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff;
scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff;
scsi->cdb[5] = scb->lba_addr & 0xff;
scsi->cdb[6] = 0; /*Reserved*/
scsi->cdb[7] = (scb->block_count >> 8) & 0xff;
scsi->cdb[8] = scb->block_count & 0xff;
scsi->cdb[9] = 0; /*Control*/
scsi->cdb_len = 10;
scsi->scsi_state = SCSI_STATE_SELECT;
scsi->scb_state = 2;
return;
case CMD_REQUEST_SENSE:
if (scsi->present[scsi->scb_id] != 0xff)
scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id;
@@ -943,7 +966,7 @@ spock_process_scsi(spock_t *scsi, scb_t *scb)
sd->buffer_length = spock_get_len(scsi, scb);
scsi_device_command_phase0(sd, scsi->temp_cdb);
spock_log("SCSI ID %i: Current CDB[0] = %02x, LUN = %i, data len = %i, max len = %i, phase val = %02x\n", scsi->cdb_id, scsi->temp_cdb[0], scsi->temp_cdb[1] >> 5, sd->buffer_length, spock_get_len(scsi, scb), sd->phase);
spock_log("SCSI ID %i: Current CDB[0]=%02x, LUN=%i, buffer len=%i, max len=%i, phase val=%02x, data len=%d, enable bit 10=%03x\n", scsi->cdb_id, scsi->temp_cdb[0], scsi->temp_cdb[1] >> 5, sd->buffer_length, spock_get_len(scsi, scb), sd->phase, scsi->data_len, scb->enable & 0x400);
if ((sd->phase != SCSI_PHASE_STATUS) && (sd->buffer_length > 0)) {
p = scsi_device_get_callback(sd);
@@ -1018,12 +1041,11 @@ spock_callback(void *priv)
if (scsi->cmd_timer) {
scsi->cmd_timer--;
if (!scsi->cmd_timer) {
if (!scsi->cmd_timer)
spock_execute_cmd(scsi, scb);
}
}
if (scsi->attention_wait && (scsi->scb_state == 0 || (scsi->attention_pending & 0xf0) == 0xe0)) {
if (scsi->attention_wait && ((scsi->scb_state == 0) || (scsi->attention_pending & 0xf0) == 0xe0)) {
scsi->attention_wait--;
if (!scsi->attention_wait) {
scsi->attention = scsi->attention_pending;

2
src/sound/resid-fp/SID.cpp
View File

@@ -107,8 +107,10 @@ constexpr unsigned int OSC_DAC_BITS = 12;
* On my 6581R4AR has 0x3A as the only value giving the same output level as 1.prg
*/
//@{
#ifdef USE_RESID_UNUSED
constexpr unsigned int OFFSET_6581 = 0x380;
constexpr unsigned int OFFSET_8580 = 0x9c0;
#endif
//@}
/**

4
src/sound/resid-fp/WaveformGenerator.cpp
View File

@@ -43,7 +43,9 @@ namespace reSIDfp
constexpr unsigned int FLOATING_OUTPUT_TTL_6581R3 = 54000;
constexpr unsigned int FLOATING_OUTPUT_FADE_6581R3 = 1400;
// ~1s
#ifdef USE_RESID_UNUSED
constexpr unsigned int FLOATING_OUTPUT_TTL_6581R4 = 1000000;
#endif
// ~1s
constexpr unsigned int FLOATING_OUTPUT_TTL_8580R5 = 800000;
constexpr unsigned int FLOATING_OUTPUT_FADE_8580R5 = 50000;
@@ -61,7 +63,9 @@ constexpr unsigned int FLOATING_OUTPUT_FADE_8580R5 = 50000;
constexpr unsigned int SHIFT_REGISTER_RESET_6581R3 = 50000;
constexpr unsigned int SHIFT_REGISTER_FADE_6581R3 = 15000;
// ~2.15s
#ifdef USE_RESID_UNUSED
constexpr unsigned int SHIFT_REGISTER_RESET_6581R4 = 2150000;
#endif
// ~2.8s
constexpr unsigned int SHIFT_REGISTER_RESET_8580R5 = 986000;
constexpr unsigned int SHIFT_REGISTER_FADE_8580R5 = 314300;

70
src/video/vid_ati_mach8.c
View File

@@ -336,7 +336,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
}
if ((dev->accel_bpp == 8) || (dev->accel_bpp == 15) || (dev->accel_bpp == 16) || (dev->accel_bpp == 24))
mach_log("RdMask=%04x, DPCONFIG=%04x, Clipping: l=%d, r=%d, t=%d, b=%d, LineDrawOpt=%04x, BPP=%d, CMDType = %d, offs=%08x, cnt = %d, input = %d, mono_src = %d, frgdsel = %d, d(%d,%d), dstxend = %d, pitch = %d, extcrt = %d, rw = %x, monpattern = %x.\n",
mach_log("RdMask=%04x, DPCONFIG=%04x, Clipping: l=%d, r=%d, t=%d, b=%d, LineDrawOpt=%04x, BPP=%d, CMDType = %d, offs=%08x, cnt = %d, input = %d, mono_src = %d, frgdsel = %d, d(%d,%d), dstxend = %d, pitch = %d, extcrt = %d, rw = %x, monopattern = %x.\n",
dev->accel.rd_mask, mach->accel.dp_config, clip_l, clip_r, clip_t, clip_b, mach->accel.linedraw_opt, dev->accel_bpp, cmd_type, mach->accel.ge_offset, count, cpu_input, mono_src, frgd_sel, dev->accel.cur_x, dev->accel.cur_y,
mach->accel.dest_x_end, dev->ext_pitch, dev->ext_crt_pitch, mach->accel.dp_config & 1, mach->accel.mono_pattern_enable);
@@ -1039,7 +1039,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
}
break;
case 2:
if (mach->accel.dp_config & 0x1000) {
if ((mach->accel.dp_config & 0x1000) || (mach->accel.dp_config & 0x04)) {
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
@@ -2185,7 +2185,7 @@ mach_accel_out_pixtrans(svga_t *svga, mach_t *mach, ibm8514_t *dev, uint16_t val
case 0x200: /*16-bit size*/
if (mono_src == 2) {
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
if ((mach->accel.dp_config & 0x1000) && !swap) {
if (((mach->accel.dp_config & 0x1000) && !swap) || swap) {
mach_log("16-bit bus size swap.\n");
val = (val >> 8) | (val << 8);
}
@@ -5184,11 +5184,11 @@ mach32_ap_writeb(uint32_t addr, uint8_t val, void *priv)
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint8_t port_dword = addr & 0xfc;
uint8_t port_dword = (addr - mach->linear_base) & 0xfc;
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if (addr & 0x100) {
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if ((addr - mach->linear_base) & 0x100) {
mach_log("Port WORDB Write=%04x.\n", 0x02ee + (port_dword << 8));
mach_accel_outb(0x02ee + (addr & 1) + (port_dword << 8), val, mach);
} else {
@@ -5199,9 +5199,9 @@ mach32_ap_writeb(uint32_t addr, uint8_t val, void *priv)
mach_log("Linear WORDB Write=%08x, val=%02x, ON=%x, dpconfig=%04x, apsize=%08x.\n",
addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20);
if (dev->on)
mach32_write_common(addr, val, 1, mach, svga);
mach32_write_common(addr - mach->linear_base, val, 1, mach, svga);
else
svga_write_linear(addr, val, svga);
svga_write_linear(addr - mach->linear_base, val, svga);
}
}
@@ -5211,11 +5211,11 @@ mach32_ap_writew(uint32_t addr, uint16_t val, void *priv)
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint8_t port_dword = addr & 0xfc;
uint8_t port_dword = (addr - mach->linear_base) & 0xfc;
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if (addr & 0x100) {
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20)))) {
if ((addr - mach->linear_base) & 0x100) {
mach_log("Port WORDW Write=%04x.\n", 0x02ee + (port_dword << 8));
mach_accel_outw(0x02ee + (port_dword << 8), val, mach);
} else {
@@ -5224,11 +5224,11 @@ mach32_ap_writew(uint32_t addr, uint16_t val, void *priv)
}
} else {
mach_log("Linear WORDW Write=%08x, val=%04x, ON=%x, dpconfig=%04x, apsize=%08x.\n",
addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20);
addr - mach->linear_base, val, dev->on, mach->accel.dp_config, mach->ap_size << 20);
if (dev->on)
mach32_writew_linear(addr, val, mach);
mach32_writew_linear(addr - mach->linear_base, val, mach);
else
svga_writew_linear(addr, val, svga);
svga_writew_linear(addr - mach->linear_base, val, svga);
}
}
@@ -5238,11 +5238,11 @@ mach32_ap_writel(uint32_t addr, uint32_t val, void *priv)
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint8_t port_dword = addr & 0xfc;
uint8_t port_dword = (addr - mach->linear_base) & 0xfc;
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if (addr & 0x100) {
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20)))) {
if ((addr - mach->linear_base) & 0x100) {
mach_log("Port WORDL Write=%04x.\n", 0x02ee + (port_dword << 8));
mach_accel_outw(0x02ee + (port_dword << 8), val & 0xffff, mach);
mach_accel_outw(0x02ee + (port_dword << 8) + 4, val >> 16, mach);
@@ -5253,11 +5253,11 @@ mach32_ap_writel(uint32_t addr, uint32_t val, void *priv)
}
} else {
mach_log("Linear WORDL Write=%08x, val=%08x, ON=%x, dpconfig=%04x, apsize=%08x.\n",
addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20);
addr - mach->linear_base, val, dev->on, mach->accel.dp_config, mach->ap_size << 20);
if (dev->on)
mach32_writel_linear(addr, val, mach);
mach32_writel_linear(addr - mach->linear_base, val, mach);
else
svga_writel_linear(addr, val, svga);
svga_writel_linear(addr - mach->linear_base, val, svga);
}
}
@@ -5268,19 +5268,19 @@ mach32_ap_readb(uint32_t addr, void *priv)
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint8_t temp;
uint8_t port_dword = addr & 0xfc;
uint8_t port_dword = (addr - mach->linear_base) & 0xfc;
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if (addr & 0x100)
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20)))) {
if ((addr - mach->linear_base) & 0x100)
temp = mach_accel_inb(0x02ee + (addr & 1) + (port_dword << 8), mach);
else
temp = mach_accel_inb(0x02e8 + (addr & 1) + (port_dword << 8), mach);
} else {
if (dev->on)
temp = mach32_read_common(addr, 1, mach, svga);
temp = mach32_read_common(addr - mach->linear_base, 1, mach, svga);
else
temp = svga_read_linear(addr, svga);
temp = svga_read_linear(addr - mach->linear_base, svga);
mach_log("Linear WORDB Read=%08x, ret=%02x, fast=%d.\n", addr, temp, svga->fast);
}
@@ -5295,19 +5295,19 @@ mach32_ap_readw(uint32_t addr, void *priv)
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint16_t temp;
uint8_t port_dword = addr & 0xfc;
uint8_t port_dword = (addr - mach->linear_base) & 0xfc;
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if (addr & 0x100)
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20)))) {
if ((addr - mach->linear_base) & 0x100)
temp = mach_accel_inw(0x02ee + (port_dword << 8), mach);
else
temp = mach_accel_inw(0x02e8 + (port_dword << 8), mach);
} else {
if (dev->on)
temp = mach32_readw_linear(addr, mach);
temp = mach32_readw_linear(addr - mach->linear_base, mach);
else
temp = svga_readw_linear(addr, svga);
temp = svga_readw_linear(addr - mach->linear_base, svga);
mach_log("Linear WORDW Read=%08x, ret=%04x.\n", addr, temp);
}
@@ -5322,11 +5322,11 @@ mach32_ap_readl(uint32_t addr, void *priv)
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint32_t temp;
uint8_t port_dword = addr & 0xfc;
uint8_t port_dword = (addr - mach->linear_base) & 0xfc;
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
((addr >= ((mach->ap_size << 20) - 0x200)) && (addr < (mach->ap_size << 20)))) {
if (addr & 0x100) {
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20)))) {
if ((addr - mach->linear_base) & 0x100) {
temp = mach_accel_inw(0x02ee + (port_dword << 8), mach);
temp |= (mach_accel_inw(0x02ee + (port_dword << 8) + 4, mach) << 8);
} else {
@@ -5335,9 +5335,9 @@ mach32_ap_readl(uint32_t addr, void *priv)
}
} else {
if (dev->on)
temp = mach32_readl_linear(addr, mach);
temp = mach32_readl_linear(addr - mach->linear_base, mach);
else
temp = svga_readl_linear(addr, svga);
temp = svga_readl_linear(addr - mach->linear_base, svga);
mach_log("Linear WORDL Read=%08x, ret=%08x, ON%d.\n", addr, temp, dev->on);
}

20
src/video/vid_ps55da2.c
View File

@@ -872,7 +872,7 @@ da2_bitblt_exec(void *p)
}
da2->bitblt.destaddr += 2;
break;
case DA2_BLT_CFILLTILE:
case DA2_BLT_CFILLTILE: {
int32_t tileaddr = da2->bitblt.srcaddr + (da2->bitblt.y % da2->bitblt.tile_w) * 2;
if (da2->bitblt.x >= da2->bitblt.size_x - 1) {
DA2_CopyPlaneDataWithBitmask(tileaddr, da2->bitblt.destaddr, da2->bitblt.maskr, da2);
@@ -891,7 +891,7 @@ da2_bitblt_exec(void *p)
}
da2->bitblt.destaddr += 2;
break;
case DA2_BLT_CCOPYF:
} case DA2_BLT_CCOPYF:
if (da2->bitblt.x >= da2->bitblt.size_x - 1) {
DA2_CopyPlaneDataWithBitmask(da2->bitblt.srcaddr, da2->bitblt.destaddr, da2->bitblt.maskr, da2);
if (da2->bitblt.y >= da2->bitblt.size_y - 1) {
@@ -1256,8 +1256,8 @@ da2_out(uint16_t addr, uint16_t val, void *p)
uint16_t
da2_in(uint16_t addr, void *p)
{
da2_t *da2 = (da2_t *) p;
uint16_t temp;
da2_t *da2 = (da2_t *) p;
uint16_t temp = 0xff;
switch (addr) {
case 0x3c3:
@@ -3020,24 +3020,24 @@ da2_reset(void *priv)
}
static void *
da2_init()
da2_init(UNUSED(const device_t *info))
{
if (svga_get_pri() == NULL)
return NULL;
svga_t *mb_vga = svga_get_pri();
mb_vga->cable_connected = 0;
da2_t *da2 = malloc(sizeof(da2_t));
da2_t *da2 = calloc(1, sizeof(da2_t));
da2->mb_vga = mb_vga;
da2->dispontime = 1000ull << 32;
da2->dispofftime = 1000ull << 32;
int memsize = 1024 * 1024;
da2->vram = malloc(memsize);
da2->vram = calloc(1, memsize);
da2->vram_mask = memsize - 1;
da2->cram = malloc(0x1000);
da2->cram = calloc(1, 0x1000);
da2->vram_display_mask = DA2_MASK_CRAM;
da2->changedvram = malloc(/*(memsize >> 12) << 1*/ 0x1000000 >> 12); /* XX000h */
da2->changedvram = calloc(1, /*(memsize >> 12) << 1*/ 0x1000000 >> 12); /* XX000h */
da2->monitorid = device_get_config_int("montype"); /* Configuration for Monitor ID (aaaa) -> (xxax xxxx, xxxx xaaa) */
da2->mmio.charset = device_get_config_int("charset");
@@ -3083,7 +3083,7 @@ da2_init()
return da2;
}
static int
da2_available()
da2_available(void)
{
return (rom_present(DA2_FONTROM_PATH_HANT) || rom_present(DA2_FONTROM_PATH_JPAN));
}

77
src/video/vid_voodoo_banshee.c
View File

@@ -30,6 +30,7 @@
#include <86box/device.h>
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/dma.h>
#include <86box/pci.h>
#include <86box/rom.h>
#include <86box/timer.h>
@@ -43,9 +44,11 @@
#include <86box/vid_svga_render.h>
#include <86box/vid_voodoo_common.h>
#include <86box/vid_voodoo_display.h>
#include <86box/vid_voodoo_fb.h>
#include <86box/vid_voodoo_fifo.h>
#include <86box/vid_voodoo_regs.h>
#include <86box/vid_voodoo_render.h>
#include <86box/vid_voodoo_texture.h>
#define ROM_BANSHEE "roms/video/voodoo/Pci_sg.rom"
#define ROM_CREATIVE_BANSHEE "roms/video/voodoo/BlasterPCI.rom"
@@ -220,6 +223,7 @@ enum {
Agp_agpHostAddressHigh = 0x08,
Agp_agpGraphicsAddress = 0x0C,
Agp_agpGraphicsStride = 0x10,
Agp_agpMoveCMD = 0x14,
};
#define VGAINIT0_RAMDAC_8BIT (1 << 2)
@@ -1365,6 +1369,10 @@ banshee_cmd_read(banshee_t *banshee, uint32_t addr)
case cmdBaseSize0:
ret = voodoo->cmdfifo_size;
if (voodoo->cmdfifo_enabled)
ret |= 0x100;
if (voodoo->cmdfifo_in_agp)
ret |= 0x200;
break;
case cmdBaseAddr1:
@@ -1394,6 +1402,10 @@ banshee_cmd_read(banshee_t *banshee, uint32_t addr)
case cmdBaseSize1:
ret = voodoo->cmdfifo_size_2;
if (voodoo->cmdfifo_enabled_2)
ret |= 0x100;
if (voodoo->cmdfifo_in_agp_2)
ret |= 0x200;
break;
case 0x108:
@@ -1613,10 +1625,11 @@ banshee_reg_writew(uint32_t addr, uint16_t val, void *priv)
}
}
static void
banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val)
void
banshee_cmd_write(void *priv, uint32_t addr, uint32_t val)
{
voodoo_t *voodoo = banshee->voodoo;
banshee_t *banshee = (banshee_t *) priv;
voodoo_t *voodoo = banshee->voodoo;
#if 0
banshee_log("banshee_cmd_write: addr=%03x val=%08x\n", addr & 0x1fc, val);
#endif
@@ -1641,6 +1654,62 @@ banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val)
banshee->agpReqSize = val;
break;
case Agp_agpMoveCMD: {
uint32_t src_addr = banshee->agpHostAddressLow;
uint32_t src_width = banshee->agpHostAddressHigh & 0x3fff;
uint32_t src_stride = (banshee->agpHostAddressHigh >> 14) & 0x3fff;
uint32_t src_end = src_addr + (banshee->agpReqSize & 0xfffff); /* don't know whether or not stride is accounted for! */
uint32_t dest_addr = banshee->agpGraphicsAddress & 0x3ffffff;
uint32_t dest_stride = banshee->agpGraphicsStride & 0x7fff;
#if 0
banshee_log("AGP: %d bytes W%d from %08x S%d to %d:%08x S%d\n", src_end - src_addr, src_width, src_addr, src_stride, (val >> 3) & 3, dest_addr, dest_stride);
#endif
switch ((val >> 3) & 3) {
case 0: /*Linear framebuffer (Banshee)*/
case 1: /*Planar YUV*/
if (voodoo->texture_present[0][(dest_addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) {
#if 0
banshee_log("texture_present at %08x %i\n", dest_addr, (dest_addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT);
#endif
flush_texture_cache(voodoo, dest_addr & voodoo->texture_mask, 0);
}
if (voodoo->texture_present[1][(dest_addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) {
#if 0
banshee_log("texture_present at %08x %i\n", dest_addr, (dest_addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT);
#endif
flush_texture_cache(voodoo, dest_addr & voodoo->texture_mask, 1);
}
while ((src_addr < src_end) && (dest_addr <= voodoo->fb_mask)) {
dma_bm_read(src_addr, &voodoo->fb_mem[dest_addr], MIN(src_width, voodoo->fb_mask - dest_addr), 4);
src_addr += src_stride;
dest_addr += dest_stride;
}
break;
case 2: /*Framebuffer*/
src_width &= ~3;
while (src_addr < src_end) {
for (uint32_t i = 0; i < src_width; i += 4)
voodoo_fb_writel(dest_addr + i, mem_readl_phys(src_addr + i), voodoo);
src_addr += src_stride;
dest_addr += dest_stride;
}
break;
case 3: /*Texture*/
src_width &= ~3;
while (src_addr < src_end) {
for (uint32_t i = 0; i < src_width; i += 4)
voodoo_tex_writel(dest_addr + i, mem_readl_phys(src_addr + i), voodoo);
src_addr += src_stride;
dest_addr += dest_stride;
}
break;
default:
break;
}
break;
}
case cmdBaseAddr0:
voodoo->cmdfifo_base = (val & 0xfff) << 12;
voodoo->cmdfifo_end = voodoo->cmdfifo_base + (((voodoo->cmdfifo_size & 0xff) + 1) << 12);
@@ -1655,6 +1724,7 @@ banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val)
voodoo->cmdfifo_enabled = val & 0x100;
if (!voodoo->cmdfifo_enabled)
voodoo->cmdfifo_in_sub = 0; /*Not sure exactly when this should be reset*/
voodoo->cmdfifo_in_agp = val & 0x200;
#if 0
banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end);
#endif
@@ -1694,6 +1764,7 @@ banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val)
voodoo->cmdfifo_enabled_2 = val & 0x100;
if (!voodoo->cmdfifo_enabled_2)
voodoo->cmdfifo_in_sub_2 = 0; /*Not sure exactly when this should be reset*/
voodoo->cmdfifo_in_agp_2 = val & 0x200;
#if 0
banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end);
#endif

77
src/video/vid_voodoo_fifo.c
View File

@@ -35,6 +35,7 @@
#include <86box/video.h>
#include <86box/vid_svga.h>
#include <86box/vid_voodoo_common.h>
#include <86box/vid_voodoo_banshee.h>
#include <86box/vid_voodoo_banshee_blitter.h>
#include <86box/vid_voodoo_fb.h>
#include <86box/vid_voodoo_fifo.h>
@@ -166,7 +167,10 @@ cmdfifo_get(voodoo_t *voodoo)
}
}
val = *(uint32_t *) &voodoo->fb_mem[voodoo->cmdfifo_rp & voodoo->fb_mask];
if (voodoo->cmdfifo_in_agp)
val = mem_readl_phys(voodoo->cmdfifo_rp);
else
val = *(uint32_t *) &voodoo->fb_mem[voodoo->cmdfifo_rp & voodoo->fb_mask];
if (!voodoo->cmdfifo_in_sub)
voodoo->cmdfifo_depth_rd++;
@@ -200,7 +204,10 @@ cmdfifo_get_2(voodoo_t *voodoo)
}
}
val = *(uint32_t *) &voodoo->fb_mem[voodoo->cmdfifo_rp_2 & voodoo->fb_mask];
if (voodoo->cmdfifo_in_agp_2)
val = mem_readl_phys(voodoo->cmdfifo_rp_2);
else
val = *(uint32_t *) &voodoo->fb_mem[voodoo->cmdfifo_rp_2 & voodoo->fb_mask];
if (!voodoo->cmdfifo_in_sub_2)
voodoo->cmdfifo_depth_rd_2++;
@@ -362,9 +369,21 @@ voodoo_fifo_thread(void *param)
break;
case 3: /*JMP local frame buffer*/
voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc;
voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc;
voodoo->cmdfifo_in_agp = 0;
#if 0
voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header);
voodoo_fifo_log("JMP LFB to %08x %04x\n", voodoo->cmdfifo_rp, header);
#endif
break;
case 4: /*JMP AGP*/
if (UNLIKELY(voodoo->type < VOODOO_BANSHEE))
fatal("CMDFIFO0: Not Banshee %08x\n", header);
voodoo->cmdfifo_rp = ((header >> 4) & 0x1fffffc) | (cmdfifo_get(voodoo) << 25);
voodoo->cmdfifo_in_agp = 1;
#if 0
voodoo_fifo_log("JMP AGP to %08x %04x\n", voodoo->cmdfifo_rp, header);
#endif
break;
@@ -573,6 +592,23 @@ voodoo_fifo_thread(void *param)
}
break;
case 6:
if (UNLIKELY(voodoo->type < VOODOO_BANSHEE)) {
fatal("CMDFIFO6: Not Banshee %08x %08x\n", header, voodoo->cmdfifo_rp);
} else {
uint32_t val = cmdfifo_get(voodoo);
banshee_cmd_write(voodoo->priv, 0x00, val >> 5); /* agpReqSize */
banshee_cmd_write(voodoo->priv, 0x04, cmdfifo_get(voodoo)); /* agpHostAddressLow */
banshee_cmd_write(voodoo->priv, 0x08, cmdfifo_get(voodoo)); /* agpHostAddressHigh */
banshee_cmd_write(voodoo->priv, 0x0c, cmdfifo_get(voodoo)); /* agpGraphicsAddress */
banshee_cmd_write(voodoo->priv, 0x10, cmdfifo_get(voodoo)); /* agpGraphicsStride */
banshee_cmd_write(voodoo->priv, 0x14, (val & 0x18) | 0x00); /* agpMoveCMD - start transfer */
#if 0
voodoo_fifo_log("CMDFIFO6 addr=%08x num=%i\n", addr, banshee->agpReqSize);
#endif
}
break;
default:
fatal("Bad CMDFIFO packet %08x %08x\n", header, voodoo->cmdfifo_rp);
}
@@ -624,9 +660,21 @@ voodoo_fifo_thread(void *param)
break;
case 3: /*JMP local frame buffer*/
voodoo->cmdfifo_rp_2 = (header >> 4) & 0xfffffc;
voodoo->cmdfifo_rp_2 = (header >> 4) & 0xfffffc;
voodoo->cmdfifo_in_agp_2 = 0;
#if 0
voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header);
voodoo_fifo_log("JMP LFB to %08x %04x\n", voodoo->cmdfifo_rp_2, header);
#endif
break;
case 4: /*JMP AGP*/
if (UNLIKELY(voodoo->type < VOODOO_BANSHEE))
fatal("CMDFIFO0: Not Banshee %08x\n", header);
voodoo->cmdfifo_rp_2 = ((header >> 4) & 0x1fffffc) | (cmdfifo_get_2(voodoo) << 25);
voodoo->cmdfifo_in_agp_2 = 1;
#if 0
voodoo_fifo_log("JMP AGP to %08x %04x\n", voodoo->cmdfifo_rp_2, header);
#endif
break;
@@ -835,6 +883,23 @@ voodoo_fifo_thread(void *param)
}
break;
case 6:
if (UNLIKELY(voodoo->type < VOODOO_BANSHEE)) {
fatal("CMDFIFO6: Not Banshee %08x %08x\n", header, voodoo->cmdfifo_rp);
} else {
uint32_t val = cmdfifo_get_2(voodoo);
banshee_cmd_write(voodoo->priv, 0x00, val >> 5); /* agpReqSize */
banshee_cmd_write(voodoo->priv, 0x04, cmdfifo_get_2(voodoo)); /* agpHostAddressLow */
banshee_cmd_write(voodoo->priv, 0x08, cmdfifo_get_2(voodoo)); /* agpHostAddressHigh */
banshee_cmd_write(voodoo->priv, 0x0c, cmdfifo_get_2(voodoo)); /* agpGraphicsAddress */
banshee_cmd_write(voodoo->priv, 0x10, cmdfifo_get_2(voodoo)); /* agpGraphicsStride */
banshee_cmd_write(voodoo->priv, 0x14, (val & 0x18) | 0x20); /* agpMoveCMD - start transfer */
#if 0
voodoo_fifo_log("CMDFIFO6 addr=%08x num=%i\n", addr, banshee->agpReqSize);
#endif
}
break;
default:
fatal("Bad CMDFIFO packet %08x %08x\n", header, voodoo->cmdfifo_rp);
}