[core] Generate linker scripts based on flash layout

boards/_base/beken-7231n.json

@@ -3,6 +3,7 @@
 		"family": "BK7231N",
 		"ldscript": "bk7231n_bsp.ld",
 		"bkboot_version": "1.0.1-bk7231n",
+		"bkoffset_app": "0x10000",
 		"bkrbl_size_app": "0x108700"
 	},
 	"flash": {

boards/_base/beken-7231u.json

@@ -3,6 +3,7 @@
 		"family": "BK7231U",
 		"ldscript": "bk7231_bsp.ld",
 		"bkboot_version": "1.0.8-bk7231u",
+		"bkoffset_app": "0x10000",
 		"bkrbl_size_app": "0x108700"
 	},
 	"flash": {

boards/_base/beken-7252.json

@@ -4,6 +4,7 @@
 		"f_cpu": "180000000L",
 		"ldscript": "bk7231_bsp.ld",
 		"bkboot_version": "0.1.3-bk7252",
+		"bkoffset_app": "0x10000",
 		"bkrbl_size_app": "0x1A0000"
 	},
 	"flash": {

boards/_base/realtek-ambz-2mb-468k.json

@@ -1,6 +1,5 @@
 {
 	"build": {
-		"ldscript": "rlx8711B-symbol-v02-img2_xip1_2M_468k_cpp.ld",
 		"amb_boot_all": "boot_all_77F7.bin"
 	},
 	"flash": {

boards/_base/realtek-ambz-2mb-788k.json

@@ -1,6 +1,5 @@
 {
 	"build": {
-		"ldscript": "rlx8711B-symbol-v02-img2_xip1_2M_cpp.ld",
 		"amb_boot_all": "boot_all_77F7.bin"
 	},
 	"flash": {

boards/_base/realtek-ambz-4mb-980k.json

@@ -1,6 +1,5 @@
 {
 	"build": {
-		"ldscript": "rlx8711B-symbol-v02-img2_xip1_4M_980k_cpp.ld",
 		"amb_boot_all": "boot_all_C556.bin"
 	},
 	"flash": {

boards/_base/realtek-ambz.json

@@ -1,6 +1,7 @@
 {
 	"build": {
 		"family": "RTL8710B",
+		"ldscript": "rlx8711B-symbol-v02-img2_xip1.ld",
 		"f_cpu": "125000000L",
 		"prefix": "arm-none-eabi-",
 		"amb_flash_addr": "0x08000000"

builder/family/beken-72xx.py

@@ -507,6 +507,8 @@ env.Replace(
     SIZECHECKCMD="$SIZETOOL -A -d $SOURCES",
     SIZEPRINTCMD="$SIZETOOL -B -d $SOURCES",
 )
+# Generate linker scripts with correct flash offsets
+env.GenerateLinkerScript(board, board.get("build.ldscript"))
 
 
 def to_offset(addr: int) -> int:

builder/family/realtek-ambz.py

@@ -259,6 +259,9 @@ env.Replace(
     SIZECHECKCMD="$SIZETOOL -A -d $SOURCES",
     SIZEPRINTCMD="$SIZETOOL -B -d $SOURCES",
 )
+# Generate linker scripts with correct flash offsets
+env.GenerateLinkerScript(board, board.get("build.ldscript"))
+env.GenerateLinkerScript(board, board.get("build.ldscript").replace("xip1", "xip2"))
 
 env.Append(
     BUILDERS=dict(

builder/frameworks/base.py

@@ -66,6 +66,7 @@ env.Append(
 found = False
 for f in family.inheritance:
     try:
+        env.Prepend(LIBPATH=[join("$CORES_DIR", f.name, "misc")])
         env.SConscript(f"../family/{f.name}.py", must_exist=True)
         found = True
     except UserError:
@@ -90,7 +91,6 @@ for f in family.inheritance:
         env.Prepend(CPPDEFINES=[(f"LT_{f.short_name}", "1")])
     if f.code:
         env.Prepend(CPPDEFINES=[(f"LT_{f.code.upper()}", "1")])
-    env.Prepend(LIBPATH=[join("$CORES_DIR", f.name, "misc")])
 
 # Sources - external libraries
 queue.AddExternalLibrary("ltchiptool")  # uf2ota source code

builder/utils/flash.py

@@ -1,11 +1,16 @@
 # Copyright (c) Kuba Szczodrzyński 2022-06-12.
 
+import re
+from os.path import isfile, join
+
+from ltchiptool.util.fileio import chext
+from platformio.platform.board import PlatformBoardConfig
 from SCons.Script import DefaultEnvironment, Environment
 
 env: Environment = DefaultEnvironment()
 
 
-def env_add_flash_layout(env: Environment, board):
+def env_add_flash_layout(env: Environment, board: PlatformBoardConfig):
     flash_layout: dict = board.get("flash")
     if flash_layout:
         defines = {}
@@ -33,4 +38,41 @@ def env_add_flash_layout(env: Environment, board):
         env.Replace(**defines)
 
 
+def env_generate_linker_script(env: Environment, board: PlatformBoardConfig, name: str):
+    template_name = chext(name, "template.ld")
+
+    # find the linker script template in LIBPATH
+    input = None
+    for path in env["LIBPATH"]:
+        path = env.subst(path)
+        if isfile(join(path, template_name)):
+            input = join(path, template_name)
+            break
+    if not input:
+        raise FileNotFoundError(template_name)
+
+    # load the .template.ld script
+    with open(input, "r") as f:
+        ldscript = f.read()
+
+    def transform(match: re.Match[str]):
+        key = match[1]
+        if key in env:
+            return env[key]
+        if key.startswith("BOARD_"):
+            key = key[6:].lower()
+            return board.get(key)
+        raise ValueError(f"Unrecognized template key: {key}")
+
+    ldscript = re.sub(r"\${([A-Z0-9_.]+)}", transform, ldscript)
+
+    # write .ld script
+    output = join("${BUILD_DIR}", name)
+    with open(env.subst(output), "w") as f:
+        f.write(ldscript)
+
+    env.Prepend(LIBPATH=["${BUILD_DIR}"])
+
+
 env.AddMethod(env_add_flash_layout, "AddFlashLayout")
+env.AddMethod(env_generate_linker_script, "GenerateLinkerScript")

cores/beken-72xx/misc/bk7231_bsp.template.ld

@@ -29,7 +29,7 @@
 /* Split memory into area for vectors and ram */
 MEMORY
 {
-	flash  (rx) : ORIGIN = 0x00010000, LENGTH = 1912K
+	flash  (rx) : ORIGIN = ${BOARD_BUILD.BKOFFSET_APP}, LENGTH = ${BOARD_BUILD.BKRBL_SIZE_APP}
 	ram   (rw!x): ORIGIN = 0x00400100, LENGTH = 256k - 0x100
 }
 

cores/beken-72xx/misc/bk7231n_bsp.template.ld

@@ -29,7 +29,7 @@
 /* Split memory into area for vectors and ram */
 MEMORY
 {
-	flash  (rx) : ORIGIN = 0x00010000, LENGTH = 1912K
+	flash  (rx) : ORIGIN = ${BOARD_BUILD.BKOFFSET_APP}, LENGTH = ${BOARD_BUILD.BKRBL_SIZE_APP}
 	tcm   (rw!x): ORIGIN = 0x003F0000, LENGTH = 60k - 512
 	itcm   (rwx): ORIGIN = 0x003FEE00, LENGTH = 4k + 512
 	ram   (rw!x): ORIGIN = 0x00400100, LENGTH = 192k - 0x100

cores/realtek-ambz/misc/rlx8711B-symbol-v02-img2_xip1.template.ld

@@ -25,8 +25,8 @@ MEMORY
 	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 16k, 32 Bytes resvd for header*/
 	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
 	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
-	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0xF5000-0x20	/* XIP1: 980k, 32 Bytes resvd for header */
+	XIP1 (rx)  : 			ORIGIN = 0x08000000+0x20+${FLASH_OTA1_OFFSET}, LENGTH = ${FLASH_OTA1_OFFSET}-0x20	/* XIP1, 32 Bytes resvd for header */
-	XIP2 (rx)  : 			ORIGIN = 0x08100000+0x20, LENGTH = 0xF5000-0x20	/* XIP2: 980k, 32 Bytes resvd for header */
+	XIP2 (rx)  : 			ORIGIN = 0x08000000+0x20+${FLASH_OTA2_OFFSET}, LENGTH = ${FLASH_OTA2_OFFSET}-0x20	/* XIP2, 32 Bytes resvd for header */
 }
 
 

cores/realtek-ambz/misc/rlx8711B-symbol-v02-img2_xip1_2M_468k_cpp.ld

@@ -1,222 +0,0 @@
-
-
-ENTRY(Reset_Handler)
-
-INCLUDE "export-rom_symbol_v01.txt"
-
-GROUP (
-  libgcc.a
-  libc.a
-  libg.a
-  libm.a
-  libnosys.a
-)
-
-MEMORY
-{
-	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
-	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
-	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
-	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x38000	/* MAIN RAM: 224k */
-	ROM_BSS_RAM (rwx)  : 		ORIGIN = 0x1003D000, LENGTH = 0x1000	/* ROM BSS RAM: 4K */
-	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
-	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
-
-	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 16k, 32 Bytes resvd for header*/
-	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
-	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
-	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0x75000-0x20	/* XIP1: 468k, 32 Bytes resvd for header */
-	XIP2 (rx)  : 			ORIGIN = 0x08080000+0x20, LENGTH = 0x75000-0x20	/* XIP2: 468k, 32 Bytes resvd for header */
-}
-
-
-
-SECTIONS
-{
-	.rom.text : { } > ROM
-	.rom.rodata : { } > ROM
-	.ARM.exidx :
-	{
-		__exidx_start = .;
-	    *(.ARM.exidx*)
-	    *(.gnu.linkonce.armexidx.*)
-		__exidx_end = .;
-	} > ROM
-	.hal.rom.bss : { } > ROMBSS_RAM
-
-	/* image1 entry, this section should in RAM and fixed address for ROM */
-	.ram_image1.entry :
-	{
-		__ram_image1_text_start__ = .;
-		__ram_start_table_start__ = .;
-		KEEP(*(SORT(.image1.entry.data*)))
-		__ram_start_table_end__ = .;
-
-		__image1_validate_code__ = .;
-		KEEP(*(.image1.validate.rodata*))
-		KEEP(*(.image1.export.symb*))
-	} > BOOTLOADER_RAM
-
-	/*  Add . to assign the start address of the section */
-	/*  to prevent the change of the start address by ld doing section alignment */
-	.ram_image1.text . :
-	{
-		/* image1 text */
-		*(.boot.ram.text*)
-		*(.boot.rodata*)
-	} > BOOTLOADER_RAM
-
-	.ram_image1.data . :
-	{
-		__ram_image1_data_start__ = .;
-		KEEP(*(.boot.ram.data*))
-		__ram_image1_data_end__ = .;
-
-		__ram_image1_text_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image1.bss . :
-	{
-		__image1_bss_start__ = .;
-		KEEP(*(.boot.ram.bss*))
-		KEEP(*(.boot.ram.end.bss*))
-		__image1_bss_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image2.entry :
-	{
-		__ram_image2_text_start__ = .;
-		__image2_entry_func__ = .;
-		KEEP(*(SORT(.image2.entry.data*)))
-
-		__image2_validate_code__ = .;
-		KEEP(*(.image2.validate.rodata*))
-
-	} > BD_RAM
-
-	.ram_image2.text :
-	{
-	  KEEP(*(.image2.ram.text*))
-	} > BD_RAM
-
-	.ram_image2.data :
-	{
-		__data_start__ = .;
-		*(.data*)
-		__data_end__ = .;
-		__ram_image2_text_end__ = .;
-		. = ALIGN(16);
-	} > BD_RAM
-
-	.ram_image2.bss :
-	{
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-	} > BD_RAM
-
-	.ram_image2.skb.bss :
-	{
-		*(.bdsram.data*)
-		__bss_end__ = .;
-	} > BD_RAM
-
-	.ram_heap.data :
-	{
-		*(.bfsram.data*)
-	} > BD_RAM
-
-	. = ALIGN(8);
-	PROVIDE(heap_start    	  = .);
-	PROVIDE(heap_end    	  = 0x1003CFFF);
-	PROVIDE(heap_len    	  = heap_end - heap_start);
-
-	.rom.bss :
-	{
-		*(.heap.stdlib*)
-	} > ROM_BSS_RAM
-
-	.ram_rdp.text :
-	{
-		__rom_top_4k_start_ = .;
-		__rdp_text_start__ = .;
-		KEEP(*(.rdp.ram.text*))
-		KEEP(*(.rdp.ram.data*))
-		__rdp_text_end__ = .;
-		. = ALIGN(16);
-
-	} > RDP_RAM
-
-	.xip_image1.text :
-	{
-		__flash_boot_text_start__ = .;
-
-		*(.flashboot.text*)
-
-		__flash_boot_text_end__ = .;
-
-		. = ALIGN(16);
-	} > XIPBOOT
-
-	.xip_image2.text :
-	{
-		__flash_text_start__ = .;
-
-		*(.img2_custom_signature*)
-		*(.text)
-		*(.text*)
-		*(.rodata)
-		*(.rodata*)
-		*(.debug_trace*)
-
-		/* https://www.embedded.com/building-bare-metal-arm-systems-with-gnu-part-3/ */
-		KEEP(*crtbegin.o(.ctors))
-		KEEP(*(EXCLUDE_FILE (*ctrend.o) .ctors))
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*crtend.o(.ctors))
-		KEEP(*crtbegin.o(.dtors))
-		KEEP(*(EXCLUDE_FILE (*crtend.o) .dtors))
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*crtend.o(.dtors))
-		*(.rodata .rodata.* .gnu.linkonce.r.*)
-
-		/* Add This for C++ support */
-		/* ambd_arduino/Arduino_package/hardware/variants/rtl8720dn_bw16/linker_scripts/gcc/rlx8721d_img2_is_arduino.ld */
-		. = ALIGN(4);
-		__preinit_array_start = .;
-		KEEP(*(.preinit_array))
-		__preinit_array_end = .;
-		. = ALIGN(4);
-		__init_array_start = .;
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		__init_array_end = .;
-		. = ALIGN(4);
-		__fini_array_start = .;
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		__fini_array_end = .;
-		/*-----------------*/
-
-		. = ALIGN (4);
-		__cmd_table_start__ = .;
-		KEEP(*(.cmd.table.data*))
-		__cmd_table_end__ = .;
-
-		/* https://community.silabs.com/s/article/understand-the-gnu-linker-script-of-cortex-m4?language=en_US */
-		KEEP(*(.init))
-		KEEP(*(.fini))
-		*(.init)
-		*(.fini)
-
-		__flash_text_end__ = .;
-
-		. = ALIGN (16);
-	} > XIP1
-}
-
-SECTIONS
-{
-	/* Bootloader symbol list */
-  boot_export_symbol = 0x10002020;
-}

cores/realtek-ambz/misc/rlx8711B-symbol-v02-img2_xip1_2M_cpp.ld

@@ -1,222 +0,0 @@
-
-
-ENTRY(Reset_Handler)
-
-INCLUDE "export-rom_symbol_v01.txt"
-
-GROUP (
-  libgcc.a
-  libc.a
-  libg.a
-  libm.a
-  libnosys.a
-)
-
-MEMORY
-{
-	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
-	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
-	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
-	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x38000	/* MAIN RAM: 224k */
-	ROM_BSS_RAM (rwx)  : 		ORIGIN = 0x1003D000, LENGTH = 0x1000	/* ROM BSS RAM: 4K */
-	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
-	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
-
-	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 16k, 32 Bytes resvd for header*/
-	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
-	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
-	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0xC5000-0x20	/* XIP1: 788k, 32 Bytes resvd for header */
-	XIP2 (rx)  : 			ORIGIN = 0x080D0000+0x20, LENGTH = 0xC5000-0x20	/* XIP2: 788k, 32 Bytes resvd for header */
-}
-
-
-
-SECTIONS
-{
-	.rom.text : { } > ROM
-	.rom.rodata : { } > ROM
-	.ARM.exidx :
-	{
-		__exidx_start = .;
-	    *(.ARM.exidx*)
-	    *(.gnu.linkonce.armexidx.*)
-		__exidx_end = .;
-	} > ROM
-	.hal.rom.bss : { } > ROMBSS_RAM
-
-	/* image1 entry, this section should in RAM and fixed address for ROM */
-	.ram_image1.entry :
-	{
-		__ram_image1_text_start__ = .;
-		__ram_start_table_start__ = .;
-		KEEP(*(SORT(.image1.entry.data*)))
-		__ram_start_table_end__ = .;
-
-		__image1_validate_code__ = .;
-		KEEP(*(.image1.validate.rodata*))
-		KEEP(*(.image1.export.symb*))
-	} > BOOTLOADER_RAM
-
-	/*  Add . to assign the start address of the section */
-	/*  to prevent the change of the start address by ld doing section alignment */
-	.ram_image1.text . :
-	{
-		/* image1 text */
-		*(.boot.ram.text*)
-		*(.boot.rodata*)
-	} > BOOTLOADER_RAM
-
-	.ram_image1.data . :
-	{
-		__ram_image1_data_start__ = .;
-		KEEP(*(.boot.ram.data*))
-		__ram_image1_data_end__ = .;
-
-		__ram_image1_text_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image1.bss . :
-	{
-		__image1_bss_start__ = .;
-		KEEP(*(.boot.ram.bss*))
-		KEEP(*(.boot.ram.end.bss*))
-		__image1_bss_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image2.entry :
-	{
-		__ram_image2_text_start__ = .;
-		__image2_entry_func__ = .;
-		KEEP(*(SORT(.image2.entry.data*)))
-
-		__image2_validate_code__ = .;
-		KEEP(*(.image2.validate.rodata*))
-
-	} > BD_RAM
-
-	.ram_image2.text :
-	{
-	  KEEP(*(.image2.ram.text*))
-	} > BD_RAM
-
-	.ram_image2.data :
-	{
-		__data_start__ = .;
-		*(.data*)
-		__data_end__ = .;
-		__ram_image2_text_end__ = .;
-		. = ALIGN(16);
-	} > BD_RAM
-
-	.ram_image2.bss :
-	{
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-	} > BD_RAM
-
-	.ram_image2.skb.bss :
-	{
-		*(.bdsram.data*)
-		__bss_end__ = .;
-	} > BD_RAM
-
-	.ram_heap.data :
-	{
-		*(.bfsram.data*)
-	} > BD_RAM
-
-	. = ALIGN(8);
-	PROVIDE(heap_start    	  = .);
-	PROVIDE(heap_end    	  = 0x1003CFFF);
-	PROVIDE(heap_len    	  = heap_end - heap_start);
-
-	.rom.bss :
-	{
-		*(.heap.stdlib*)
-	} > ROM_BSS_RAM
-
-	.ram_rdp.text :
-	{
-		__rom_top_4k_start_ = .;
-		__rdp_text_start__ = .;
-		KEEP(*(.rdp.ram.text*))
-		KEEP(*(.rdp.ram.data*))
-		__rdp_text_end__ = .;
-		. = ALIGN(16);
-
-	} > RDP_RAM
-
-	.xip_image1.text :
-	{
-		__flash_boot_text_start__ = .;
-
-		*(.flashboot.text*)
-
-		__flash_boot_text_end__ = .;
-
-		. = ALIGN(16);
-	} > XIPBOOT
-
-	.xip_image2.text :
-	{
-		__flash_text_start__ = .;
-
-		*(.img2_custom_signature*)
-		*(.text)
-		*(.text*)
-		*(.rodata)
-		*(.rodata*)
-		*(.debug_trace*)
-
-		/* https://www.embedded.com/building-bare-metal-arm-systems-with-gnu-part-3/ */
-		KEEP(*crtbegin.o(.ctors))
-		KEEP(*(EXCLUDE_FILE (*ctrend.o) .ctors))
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*crtend.o(.ctors))
-		KEEP(*crtbegin.o(.dtors))
-		KEEP(*(EXCLUDE_FILE (*crtend.o) .dtors))
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*crtend.o(.dtors))
-		*(.rodata .rodata.* .gnu.linkonce.r.*)
-
-		/* Add This for C++ support */
-		/* ambd_arduino/Arduino_package/hardware/variants/rtl8720dn_bw16/linker_scripts/gcc/rlx8721d_img2_is_arduino.ld */
-		. = ALIGN(4);
-		__preinit_array_start = .;
-		KEEP(*(.preinit_array))
-		__preinit_array_end = .;
-		. = ALIGN(4);
-		__init_array_start = .;
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		__init_array_end = .;
-		. = ALIGN(4);
-		__fini_array_start = .;
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		__fini_array_end = .;
-		/*-----------------*/
-
-		. = ALIGN (4);
-		__cmd_table_start__ = .;
-		KEEP(*(.cmd.table.data*))
-		__cmd_table_end__ = .;
-
-		/* https://community.silabs.com/s/article/understand-the-gnu-linker-script-of-cortex-m4?language=en_US */
-		KEEP(*(.init))
-		KEEP(*(.fini))
-		*(.init)
-		*(.fini)
-
-		__flash_text_end__ = .;
-
-		. = ALIGN (16);
-	} > XIP1
-}
-
-SECTIONS
-{
-	/* Bootloader symbol list */
-  boot_export_symbol = 0x10002020;
-}

cores/realtek-ambz/misc/rlx8711B-symbol-v02-img2_xip2.template.ld

@@ -25,8 +25,8 @@ MEMORY
 	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 16k, 32 Bytes resvd for header*/
 	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
 	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
-	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0x75000-0x20	/* XIP1: 468k, 32 Bytes resvd for header */
+	XIP1 (rx)  : 			ORIGIN = 0x08000000+0x20+${FLASH_OTA1_OFFSET}, LENGTH = ${FLASH_OTA1_OFFSET}-0x20	/* XIP1, 32 Bytes resvd for header */
-	XIP2 (rx)  : 			ORIGIN = 0x08080000+0x20, LENGTH = 0x75000-0x20	/* XIP2: 468k, 32 Bytes resvd for header */
+	XIP2 (rx)  : 			ORIGIN = 0x08000000+0x20+${FLASH_OTA2_OFFSET}, LENGTH = ${FLASH_OTA2_OFFSET}-0x20	/* XIP2, 32 Bytes resvd for header */
 }
 
 

cores/realtek-ambz/misc/rlx8711B-symbol-v02-img2_xip2_2M_cpp.ld

@@ -1,222 +0,0 @@
-
-
-ENTRY(Reset_Handler)
-
-INCLUDE "export-rom_symbol_v01.txt"
-
-GROUP (
-  libgcc.a
-  libc.a
-  libg.a
-  libm.a
-  libnosys.a
-)
-
-MEMORY
-{
-	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
-	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
-	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
-	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x38000	/* MAIN RAM: 224k */
-	ROM_BSS_RAM (rwx)  : 		ORIGIN = 0x1003D000, LENGTH = 0x1000	/* ROM BSS RAM: 4K */
-	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
-	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
-
-	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 16k, 32 Bytes resvd for header*/
-	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
-	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
-	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0xC5000-0x20	/* XIP1: 788k, 32 Bytes resvd for header */
-	XIP2 (rx)  : 			ORIGIN = 0x080D0000+0x20, LENGTH = 0xC5000-0x20	/* XIP2: 788k, 32 Bytes resvd for header */
-}
-
-
-
-SECTIONS
-{
-	.rom.text : { } > ROM
-	.rom.rodata : { } > ROM
-	.ARM.exidx :
-	{
-		__exidx_start = .;
-	    *(.ARM.exidx*)
-	    *(.gnu.linkonce.armexidx.*)
-		__exidx_end = .;
-	} > ROM
-	.hal.rom.bss : { } > ROMBSS_RAM
-
-	/* image1 entry, this section should in RAM and fixed address for ROM */
-	.ram_image1.entry :
-	{
-		__ram_image1_text_start__ = .;
-		__ram_start_table_start__ = .;
-		KEEP(*(SORT(.image1.entry.data*)))
-		__ram_start_table_end__ = .;
-
-		__image1_validate_code__ = .;
-		KEEP(*(.image1.validate.rodata*))
-		KEEP(*(.image1.export.symb*))
-	} > BOOTLOADER_RAM
-
-	/*  Add . to assign the start address of the section */
-	/*  to prevent the change of the start address by ld doing section alignment */
-	.ram_image1.text . :
-	{
-		/* image1 text */
-		*(.boot.ram.text*)
-		*(.boot.rodata*)
-	} > BOOTLOADER_RAM
-
-	.ram_image1.data . :
-	{
-		__ram_image1_data_start__ = .;
-		KEEP(*(.boot.ram.data*))
-		__ram_image1_data_end__ = .;
-
-		__ram_image1_text_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image1.bss . :
-	{
-		__image1_bss_start__ = .;
-		KEEP(*(.boot.ram.bss*))
-		KEEP(*(.boot.ram.end.bss*))
-		__image1_bss_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image2.entry :
-	{
-		__ram_image2_text_start__ = .;
-		__image2_entry_func__ = .;
-		KEEP(*(SORT(.image2.entry.data*)))
-
-		__image2_validate_code__ = .;
-		KEEP(*(.image2.validate.rodata*))
-
-	} > BD_RAM
-
-	.ram_image2.text :
-	{
-	  KEEP(*(.image2.ram.text*))
-	} > BD_RAM
-
-	.ram_image2.data :
-	{
-		__data_start__ = .;
-		*(.data*)
-		__data_end__ = .;
-		__ram_image2_text_end__ = .;
-		. = ALIGN(16);
-	} > BD_RAM
-
-	.ram_image2.bss :
-	{
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-	} > BD_RAM
-
-	.ram_image2.skb.bss :
-	{
-		*(.bdsram.data*)
-		__bss_end__ = .;
-	} > BD_RAM
-
-	.ram_heap.data :
-	{
-		*(.bfsram.data*)
-	} > BD_RAM
-
-	. = ALIGN(8);
-	PROVIDE(heap_start    	  = .);
-	PROVIDE(heap_end    	  = 0x1003CFFF);
-	PROVIDE(heap_len    	  = heap_end - heap_start);
-
-	.rom.bss :
-	{
-		*(.heap.stdlib*)
-	} > ROM_BSS_RAM
-
-	.ram_rdp.text :
-	{
-		__rom_top_4k_start_ = .;
-		__rdp_text_start__ = .;
-		KEEP(*(.rdp.ram.text*))
-		KEEP(*(.rdp.ram.data*))
-		__rdp_text_end__ = .;
-		. = ALIGN(16);
-
-	} > RDP_RAM
-
-	.xip_image1.text :
-	{
-		__flash_boot_text_start__ = .;
-
-		*(.flashboot.text*)
-
-		__flash_boot_text_end__ = .;
-
-		. = ALIGN(16);
-	} > XIPBOOT
-
-	.xip_image2.text :
-	{
-		__flash_text_start__ = .;
-
-		*(.img2_custom_signature*)
-		*(.text)
-		*(.text*)
-		*(.rodata)
-		*(.rodata*)
-		*(.debug_trace*)
-
-		/* https://www.embedded.com/building-bare-metal-arm-systems-with-gnu-part-3/ */
-		KEEP(*crtbegin.o(.ctors))
-		KEEP(*(EXCLUDE_FILE (*ctrend.o) .ctors))
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*crtend.o(.ctors))
-		KEEP(*crtbegin.o(.dtors))
-		KEEP(*(EXCLUDE_FILE (*crtend.o) .dtors))
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*crtend.o(.dtors))
-		*(.rodata .rodata.* .gnu.linkonce.r.*)
-
-		/* Add This for C++ support */
-		/* ambd_arduino/Arduino_package/hardware/variants/rtl8720dn_bw16/linker_scripts/gcc/rlx8721d_img2_is_arduino.ld */
-		. = ALIGN(4);
-		__preinit_array_start = .;
-		KEEP(*(.preinit_array))
-		__preinit_array_end = .;
-		. = ALIGN(4);
-		__init_array_start = .;
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		__init_array_end = .;
-		. = ALIGN(4);
-		__fini_array_start = .;
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		__fini_array_end = .;
-		/*-----------------*/
-
-		. = ALIGN (4);
-		__cmd_table_start__ = .;
-		KEEP(*(.cmd.table.data*))
-		__cmd_table_end__ = .;
-
-		/* https://community.silabs.com/s/article/understand-the-gnu-linker-script-of-cortex-m4?language=en_US */
-		KEEP(*(.init))
-		KEEP(*(.fini))
-		*(.init)
-		*(.fini)
-
-		__flash_text_end__ = .;
-
-		. = ALIGN (16);
-	} > XIP2
-}
-
-SECTIONS
-{
-	/* Bootloader symbol list */
-  boot_export_symbol = 0x10002020;
-}

cores/realtek-ambz/misc/rlx8711B-symbol-v02-img2_xip2_4M_980k_cpp.ld

@@ -1,222 +0,0 @@
-
-
-ENTRY(Reset_Handler)
-
-INCLUDE "export-rom_symbol_v01.txt"
-
-GROUP (
-  libgcc.a
-  libc.a
-  libg.a
-  libm.a
-  libnosys.a
-)
-
-MEMORY
-{
-	ROM (rx) : 			ORIGIN = 0x00000000, LENGTH = 0x80000	/* ROM: 512k */
-	ROMBSS_RAM (rw)  : 		ORIGIN = 0x10000000, LENGTH = 0x2000	/* ROM BSS RAM: 8K */
-	BOOTLOADER_RAM (rwx)  : 	ORIGIN = 0x10002000, LENGTH = 0x3000	/* BOOT Loader RAM: 12K */
-	BD_RAM (rwx)  : 		ORIGIN = 0x10005000, LENGTH = 0x38000	/* MAIN RAM: 224k */
-	ROM_BSS_RAM (rwx)  : 		ORIGIN = 0x1003D000, LENGTH = 0x1000	/* ROM BSS RAM: 4K */
-	MSP_RAM (wx)  : 		ORIGIN = 0x1003E000, LENGTH = 0x1000	/* MSP RAM: 4k */
-	RDP_RAM (wx)  : 		ORIGIN = 0x1003F000, LENGTH = 0xFF0	/* RDP RAM: 4k-0x10 */
-
-	XIPBOOT (rx)  :			ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20	/* XIPBOOT: 16k, 32 Bytes resvd for header*/
-	XIPSYS (r) :			ORIGIN = 0x08009000, LENGTH = 0x1000	/* XIPSYS: 4K system data in flash */
-	XIPCAL (r) :			ORIGIN = 0x0800A000, LENGTH = 0x1000	/* XIPCAL: 4K calibration data in flash */
-	XIP1 (rx)  : 			ORIGIN = 0x0800B000+0x20, LENGTH = 0xF5000-0x20	/* XIP1: 980k, 32 Bytes resvd for header */
-	XIP2 (rx)  : 			ORIGIN = 0x08100000+0x20, LENGTH = 0xF5000-0x20	/* XIP2: 980k, 32 Bytes resvd for header */
-}
-
-
-
-SECTIONS
-{
-	.rom.text : { } > ROM
-	.rom.rodata : { } > ROM
-	.ARM.exidx :
-	{
-		__exidx_start = .;
-	    *(.ARM.exidx*)
-	    *(.gnu.linkonce.armexidx.*)
-		__exidx_end = .;
-	} > ROM
-	.hal.rom.bss : { } > ROMBSS_RAM
-
-	/* image1 entry, this section should in RAM and fixed address for ROM */
-	.ram_image1.entry :
-	{
-		__ram_image1_text_start__ = .;
-		__ram_start_table_start__ = .;
-		KEEP(*(SORT(.image1.entry.data*)))
-		__ram_start_table_end__ = .;
-
-		__image1_validate_code__ = .;
-		KEEP(*(.image1.validate.rodata*))
-		KEEP(*(.image1.export.symb*))
-	} > BOOTLOADER_RAM
-
-	/*  Add . to assign the start address of the section */
-	/*  to prevent the change of the start address by ld doing section alignment */
-	.ram_image1.text . :
-	{
-		/* image1 text */
-		*(.boot.ram.text*)
-		*(.boot.rodata*)
-	} > BOOTLOADER_RAM
-
-	.ram_image1.data . :
-	{
-		__ram_image1_data_start__ = .;
-		KEEP(*(.boot.ram.data*))
-		__ram_image1_data_end__ = .;
-
-		__ram_image1_text_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image1.bss . :
-	{
-		__image1_bss_start__ = .;
-		KEEP(*(.boot.ram.bss*))
-		KEEP(*(.boot.ram.end.bss*))
-		__image1_bss_end__ = .;
-	} > BOOTLOADER_RAM
-
-	.ram_image2.entry :
-	{
-		__ram_image2_text_start__ = .;
-		__image2_entry_func__ = .;
-		KEEP(*(SORT(.image2.entry.data*)))
-
-		__image2_validate_code__ = .;
-		KEEP(*(.image2.validate.rodata*))
-
-	} > BD_RAM
-
-	.ram_image2.text :
-	{
-	  KEEP(*(.image2.ram.text*))
-	} > BD_RAM
-
-	.ram_image2.data :
-	{
-		__data_start__ = .;
-		*(.data*)
-		__data_end__ = .;
-		__ram_image2_text_end__ = .;
-		. = ALIGN(16);
-	} > BD_RAM
-
-	.ram_image2.bss :
-	{
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-	} > BD_RAM
-
-	.ram_image2.skb.bss :
-	{
-		*(.bdsram.data*)
-		__bss_end__ = .;
-	} > BD_RAM
-
-	.ram_heap.data :
-	{
-		*(.bfsram.data*)
-	} > BD_RAM
-
-	. = ALIGN(8);
-	PROVIDE(heap_start    	  = .);
-	PROVIDE(heap_end    	  = 0x1003CFFF);
-	PROVIDE(heap_len    	  = heap_end - heap_start);
-
-	.rom.bss :
-	{
-		*(.heap.stdlib*)
-	} > ROM_BSS_RAM
-
-	.ram_rdp.text :
-	{
-		__rom_top_4k_start_ = .;
-		__rdp_text_start__ = .;
-		KEEP(*(.rdp.ram.text*))
-		KEEP(*(.rdp.ram.data*))
-		__rdp_text_end__ = .;
-		. = ALIGN(16);
-
-	} > RDP_RAM
-
-	.xip_image1.text :
-	{
-		__flash_boot_text_start__ = .;
-
-		*(.flashboot.text*)
-
-		__flash_boot_text_end__ = .;
-
-		. = ALIGN(16);
-	} > XIPBOOT
-
-	.xip_image2.text :
-	{
-		__flash_text_start__ = .;
-
-		*(.img2_custom_signature*)
-		*(.text)
-		*(.text*)
-		*(.rodata)
-		*(.rodata*)
-		*(.debug_trace*)
-
-		/* https://www.embedded.com/building-bare-metal-arm-systems-with-gnu-part-3/ */
-		KEEP(*crtbegin.o(.ctors))
-		KEEP(*(EXCLUDE_FILE (*ctrend.o) .ctors))
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*crtend.o(.ctors))
-		KEEP(*crtbegin.o(.dtors))
-		KEEP(*(EXCLUDE_FILE (*crtend.o) .dtors))
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*crtend.o(.dtors))
-		*(.rodata .rodata.* .gnu.linkonce.r.*)
-
-		/* Add This for C++ support */
-		/* ambd_arduino/Arduino_package/hardware/variants/rtl8720dn_bw16/linker_scripts/gcc/rlx8721d_img2_is_arduino.ld */
-		. = ALIGN(4);
-		__preinit_array_start = .;
-		KEEP(*(.preinit_array))
-		__preinit_array_end = .;
-		. = ALIGN(4);
-		__init_array_start = .;
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		__init_array_end = .;
-		. = ALIGN(4);
-		__fini_array_start = .;
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		__fini_array_end = .;
-		/*-----------------*/
-
-		. = ALIGN (4);
-		__cmd_table_start__ = .;
-		KEEP(*(.cmd.table.data*))
-		__cmd_table_end__ = .;
-
-		/* https://community.silabs.com/s/article/understand-the-gnu-linker-script-of-cortex-m4?language=en_US */
-		KEEP(*(.init))
-		KEEP(*(.fini))
-		*(.init)
-		*(.fini)
-
-		__flash_text_end__ = .;
-
-		. = ALIGN (16);
-	} > XIP2
-}
-
-SECTIONS
-{
-	/* Bootloader symbol list */
-  boot_export_symbol = 0x10002020;
-}