[core] Add lt_set_debug_mode() function, update core types

This commit is contained in:
Kuba Szczodrzyński
2023-05-27 16:03:46 +02:00
parent bc1b83d931
commit 4532c88873
6 changed files with 61 additions and 34 deletions

View File

@@ -30,7 +30,7 @@ lt_cpu_model_t lt_cpu_get_model() {
}
const char *lt_cpu_get_core_type() {
return "ARM968E-S";
return "ARM968E-S (ARMv5TE)";
}
/*_____ _

View File

@@ -58,6 +58,13 @@ lt_reboot_reason_t lt_get_reboot_reason();
*/
const char *lt_get_reboot_reason_name(lt_reboot_reason_t reason);
/**
* @brief Set debugger mode (JTAG, SWD or OFF).
*
* @return whether the mode is supported, and setting it was successful
*/
bool lt_set_debug_mode(lt_debug_mode_t mode);
/**
* @brief Reconfigure GPIO pins used for debugging
* (SWD/JTAG), so that they can be used as normal I/O.

View File

@@ -140,8 +140,12 @@ const char *lt_get_reboot_reason_name(lt_reboot_reason_t reason) {
}
}
__attribute__((weak)) bool lt_set_debug_mode(lt_debug_mode_t mode) {
return false;
}
__attribute__((weak)) void lt_gpio_recover() {
// nop by default
lt_set_debug_mode(DEBUG_MODE_OFF);
}
/*______ _ _

View File

@@ -86,3 +86,9 @@ typedef enum {
OTA_TYPE_DUAL = 1,
OTA_TYPE_FILE = 2,
} lt_ota_type_t;
typedef enum {
DEBUG_MODE_OFF = 0,
DEBUG_MODE_JTAG = 1,
DEBUG_MODE_SWD = 2,
} lt_debug_mode_t;

View File

@@ -44,7 +44,7 @@ uint32_t lt_cpu_get_mac_id() {
}
const char *lt_cpu_get_core_type() {
return "ARM Cortex-M4F";
return "ARM Cortex-M4F (ARMv7E-M)";
}
uint32_t lt_cpu_get_freq() {
@@ -73,11 +73,23 @@ bool lt_reboot_download_mode() {
return true;
}
void lt_gpio_recover() {
// PA14 and PA15 are apparently unusable with SWD enabled
sys_jtag_off();
Pinmux_Config(PA_14, PINMUX_FUNCTION_GPIO);
Pinmux_Config(PA_15, PINMUX_FUNCTION_GPIO);
bool lt_set_debug_mode(lt_debug_mode_t mode) {
uint32_t *swd;
switch (mode) {
case DEBUG_MODE_OFF:
sys_jtag_off();
Pinmux_Config(PA_14, PINMUX_FUNCTION_GPIO);
Pinmux_Config(PA_15, PINMUX_FUNCTION_GPIO);
return true;
case DEBUG_MODE_SWD:
Pinmux_Config(PA_14, PINMUX_FUNCTION_SWD);
Pinmux_Config(PA_15, PINMUX_FUNCTION_SWD);
uint32_t *swd = (uint32_t *)0x400000A4;
*swd |= 0x1000;
return true;
default:
return false;
}
}
/*______ _ _
@@ -187,25 +199,3 @@ bool lt_ota_switch(bool revert) {
flash_write_word(NULL, FLASH_SYSTEM_OFFSET + 4, value);
return true;
}
/*_ __ _ _ _
\ \ / / | | | | | |
\ \ /\ / /_ _| |_ ___| |__ __| | ___ __ _
\ \/ \/ / _` | __/ __| '_ \ / _` |/ _ \ / _` |
\ /\ / (_| | || (__| | | | (_| | (_) | (_| |
\/ \/ \__,_|\__\___|_| |_|\__,_|\___/ \__, |
__/ |
|___*/
bool lt_wdt_enable(uint32_t timeout) {
watchdog_init(timeout);
watchdog_start();
return true;
}
void lt_wdt_disable() {
watchdog_stop();
}
void lt_wdt_feed() {
watchdog_refresh();
}

View File

@@ -29,7 +29,7 @@ lt_cpu_model_t lt_cpu_get_model() {
}
const char *lt_cpu_get_core_type() {
return "ARM Cortex-M4";
return "ARM Cortex-M33 (ARMv8-M)";
}
uint32_t lt_cpu_get_freq() {
@@ -74,9 +74,29 @@ lt_reboot_reason_t lt_get_reboot_reason() {
}
}
void lt_gpio_recover() {
sys_jtag_off();
sys_swd_off();
bool lt_set_debug_mode(lt_debug_mode_t mode) {
switch (mode) {
case DEBUG_MODE_OFF:
if (hal_misc_jtag_pin_ctrl(0) != HAL_OK)
return false;
if (hal_misc_swd_pin_ctrl(0) != HAL_OK)
return false;
return true;
case DEBUG_MODE_JTAG:
if (hal_misc_swd_pin_ctrl(0) != HAL_OK)
return false;
if (hal_misc_jtag_pin_ctrl(1) != HAL_OK)
return false;
return true;
case DEBUG_MODE_SWD:
if (hal_misc_jtag_pin_ctrl(0) != HAL_OK)
return false;
if (hal_misc_swd_pin_ctrl(1) != HAL_OK)
return false;
return true;
default:
return false;
}
}
/*__ __