Compare commits
18 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
|
|
d17ea4da0f | ||
|
|
2ea0066536 | ||
|
|
3d23211c1e | ||
|
|
1769680d9e | ||
|
|
92351c0b92 | ||
|
|
0f6c31386b | ||
|
|
a9009a8cee | ||
|
|
31e1d51dbd | ||
|
|
41819f2fd6 | ||
|
|
17043f634f | ||
|
|
e1c5761df9 | ||
|
|
fbaae21011 | ||
|
|
fa2064b957 | ||
|
|
21a194f43d | ||
|
|
b255402659 | ||
|
|
dfabfbb921 | ||
|
|
3b36a70c9a | ||
|
|
d1386a8e9d |
@@ -1,3 +1,4 @@
|
||||
# 2024-07-30
|
||||
Language: Cpp
|
||||
BasedOnStyle: LLVM
|
||||
AlignAfterOpenBracket: BlockIndent
|
||||
@@ -6,6 +7,7 @@ AlignConsecutiveAssignments: true
|
||||
AlignConsecutiveMacros: AcrossComments
|
||||
AlignTrailingComments: true
|
||||
AllowAllArgumentsOnNextLine: false
|
||||
AllowAllParametersOfDeclarationOnNextLine: false
|
||||
AllowShortBlocksOnASingleLine: Empty
|
||||
AllowShortFunctionsOnASingleLine: Empty
|
||||
AlwaysBreakTemplateDeclarations: Yes
|
||||
@@ -21,6 +23,7 @@ IndentCaseLabels: true
|
||||
IndentWidth: 4
|
||||
LambdaBodyIndentation: Signature
|
||||
MaxEmptyLinesToKeep: 1
|
||||
PenaltyReturnTypeOnItsOwnLine: 1000
|
||||
# PointerAlignment: Left # TODO enable this and reformat project
|
||||
QualifierAlignment: Left
|
||||
ReflowComments: true
|
||||
|
||||
90
boards/_base/pcb/afw121t.json
Normal file
90
boards/_base/pcb/afw121t.json
Normal file
@@ -0,0 +1,90 @@
|
||||
{
|
||||
"pcb": {
|
||||
"templates": [
|
||||
"99iot-21p",
|
||||
"pcb-blue-light",
|
||||
"rf-type1"
|
||||
],
|
||||
"scale": 16,
|
||||
"vars": {
|
||||
"TRACE_COLOR": "#FAFD9D"
|
||||
},
|
||||
"pinout_hidden": "I2S,TRIG,WAKE,CTS,RTS,SD",
|
||||
"pinout": {
|
||||
"1": {
|
||||
"GND": null
|
||||
},
|
||||
"2": {
|
||||
"CTRL": "RF_O"
|
||||
},
|
||||
"3": {
|
||||
"GND": null
|
||||
},
|
||||
"4": {
|
||||
"NC": null
|
||||
},
|
||||
"5": {
|
||||
"CTRL": "CEN"
|
||||
},
|
||||
"6": {
|
||||
"IC": 13,
|
||||
"ARD": "D0"
|
||||
},
|
||||
"7": {
|
||||
"IC": 14,
|
||||
"ARD": "D1"
|
||||
},
|
||||
"8": {
|
||||
"IC": 16,
|
||||
"ARD": "D2"
|
||||
},
|
||||
"9": {
|
||||
"IC": 17,
|
||||
"ARD": "D3"
|
||||
},
|
||||
"10": {
|
||||
"GND": null
|
||||
},
|
||||
"11": {
|
||||
"PWR": 3.3
|
||||
},
|
||||
"12": {
|
||||
"GND": null
|
||||
},
|
||||
"13": {
|
||||
"NC": null
|
||||
},
|
||||
"14": {
|
||||
"IC": 28,
|
||||
"ARD": "D5"
|
||||
},
|
||||
"15": {
|
||||
"IC": 29,
|
||||
"ARD": "D6"
|
||||
},
|
||||
"16": {
|
||||
"IC": 30,
|
||||
"ARD": "D7"
|
||||
},
|
||||
"17": {
|
||||
"IC": 31,
|
||||
"ARD": "D8"
|
||||
},
|
||||
"18": {
|
||||
"IC": 32,
|
||||
"ARD": "D9"
|
||||
},
|
||||
"19": {
|
||||
"IC": 1,
|
||||
"ARD": "D10"
|
||||
},
|
||||
"20": {
|
||||
"IC": 2,
|
||||
"ARD": "D4"
|
||||
},
|
||||
"21": {
|
||||
"GND": null
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
16
boards/_base/realtek-ambz-1mb-468k.json
Normal file
16
boards/_base/realtek-ambz-1mb-468k.json
Normal file
@@ -0,0 +1,16 @@
|
||||
{
|
||||
"build": {
|
||||
"amb_boot_all": "boot_all_77F7.bin"
|
||||
},
|
||||
"flash": {
|
||||
"ota1": "0x00B000+0x75000",
|
||||
"ota2": "0x080000+0x75000",
|
||||
"kvs": "0x0F5000+0x4000",
|
||||
"userdata": "0x0F9000+0x7000"
|
||||
},
|
||||
"upload": {
|
||||
"flash_size": 1048576,
|
||||
"maximum_size": 479232
|
||||
}
|
||||
}
|
||||
|
||||
24
boards/afw121t.json
Normal file
24
boards/afw121t.json
Normal file
@@ -0,0 +1,24 @@
|
||||
{
|
||||
"_base": [
|
||||
"realtek-ambz",
|
||||
"realtek-ambz-1mb-468k",
|
||||
"realtek-ambz-bx",
|
||||
"ic/rtl8710bn",
|
||||
"pcb/afw121t"
|
||||
],
|
||||
"build": {
|
||||
"mcu": "rtl8710bx",
|
||||
"variant": "afw121t"
|
||||
},
|
||||
"name": "AFW121T",
|
||||
"url": "https://item.szlcsc.com/357903.html?fromZone=l_b__%2522brand%2522",
|
||||
"vendor": "99iot(Shenzhen)co.,ltd",
|
||||
"pcb": {
|
||||
"symbol": "AFW121T"
|
||||
},
|
||||
"doc": {
|
||||
"links": {
|
||||
"Vendor datasheet": "https://item.szlcsc.com/datasheet/AFW121TI-AY1LED1/357903.html"
|
||||
}
|
||||
}
|
||||
}
|
||||
142
boards/templates/99iot-21p.json
Normal file
142
boards/templates/99iot-21p.json
Normal file
@@ -0,0 +1,142 @@
|
||||
{
|
||||
"name": "99iot-21p",
|
||||
"title": "99iot 21-pin modules",
|
||||
"width": 18,
|
||||
"height": 22,
|
||||
"vars": {
|
||||
"PINTYPE_VERT": "pin_vert_cast_nohole",
|
||||
"PINTYPE_HORZ": "pin_horz_cast_nohole",
|
||||
"RASTER": 1.2,
|
||||
"RF_W": 18,
|
||||
"RF_H": 3.9
|
||||
},
|
||||
"front": [
|
||||
{
|
||||
"comment": "PCB soldermask",
|
||||
"type": "rect",
|
||||
"pos": "0,0",
|
||||
"size": "18,22",
|
||||
"preset": "${MASK_PRESET}"
|
||||
},
|
||||
{
|
||||
"comment": "Metal shielding",
|
||||
"type": "rect",
|
||||
"pos": "1.105,7",
|
||||
"size": "15.79,14.58",
|
||||
"preset": "shield"
|
||||
},
|
||||
{
|
||||
"comment": "Pins (1-3)",
|
||||
"id": "left_t",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 3,
|
||||
"pos": "0,3.9",
|
||||
"vars": {
|
||||
"PINDIR": "left"
|
||||
}
|
||||
},
|
||||
{
|
||||
"comment": "Pins (3-10)",
|
||||
"id": "left_b",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 7,
|
||||
"pos": "0,12.8",
|
||||
"vars": {
|
||||
"PINDIR": "left"
|
||||
}
|
||||
},
|
||||
{
|
||||
"comment": "Pins (10-20)",
|
||||
"id": "right_b",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 10,
|
||||
"pos": "18,9.2",
|
||||
"vars": {
|
||||
"PINDIR": "right"
|
||||
}
|
||||
},
|
||||
{
|
||||
"comment": "Pin 21",
|
||||
"id": "right_t",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 1,
|
||||
"pos": "18,7",
|
||||
"vars": {
|
||||
"PINDIR": "right"
|
||||
}
|
||||
}
|
||||
],
|
||||
"back": [
|
||||
{
|
||||
"comment": "PCB soldermask",
|
||||
"type": "rect",
|
||||
"pos": "0,0",
|
||||
"size": "18,22",
|
||||
"preset": "${MASK_PRESET}"
|
||||
},
|
||||
{
|
||||
"comment": "Pins (1-3)",
|
||||
"id": "left_t",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 3,
|
||||
"pos": "0,3.9",
|
||||
"vars": {
|
||||
"PINDIR": "left"
|
||||
}
|
||||
},
|
||||
{
|
||||
"comment": "Pins (3-10)",
|
||||
"id": "left_b",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 7,
|
||||
"pos": "0,12.8",
|
||||
"vars": {
|
||||
"PINDIR": "left"
|
||||
}
|
||||
},
|
||||
{
|
||||
"comment": "Pins (10-20)",
|
||||
"id": "right_b",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 10,
|
||||
"pos": "18,9.2",
|
||||
"vars": {
|
||||
"PINDIR": "right"
|
||||
}
|
||||
},
|
||||
{
|
||||
"comment": "Pin 21",
|
||||
"id": "right_t",
|
||||
"name": "r_pins_vert",
|
||||
"repeat": 1,
|
||||
"pos": "18,7",
|
||||
"vars": {
|
||||
"PINDIR": "right"
|
||||
}
|
||||
}
|
||||
],
|
||||
"pads": {
|
||||
"1": "99iot-21p.front.left_t.pin1",
|
||||
"2": "99iot-21p.front.left_t.pin2",
|
||||
"3": "99iot-21p.front.left_t.pin3",
|
||||
"4": "99iot-21p.front.left_b.pin1",
|
||||
"5": "99iot-21p.front.left_b.pin2",
|
||||
"6": "99iot-21p.front.left_b.pin3",
|
||||
"7": "99iot-21p.front.left_b.pin4",
|
||||
"8": "99iot-21p.front.left_b.pin5",
|
||||
"9": "99iot-21p.front.left_b.pin6",
|
||||
"10": "99iot-21p.front.left_b.pin7",
|
||||
"11": "99iot-21p.front.right_b.pin10",
|
||||
"12": "99iot-21p.front.right_b.pin9",
|
||||
"13": "99iot-21p.front.right_b.pin8",
|
||||
"14": "99iot-21p.front.right_b.pin7",
|
||||
"15": "99iot-21p.front.right_b.pin6",
|
||||
"16": "99iot-21p.front.right_b.pin5",
|
||||
"17": "99iot-21p.front.right_b.pin4",
|
||||
"18": "99iot-21p.front.right_b.pin3",
|
||||
"19": "99iot-21p.front.right_b.pin2",
|
||||
"20": "99iot-21p.front.right_b.pin1",
|
||||
"21": "99iot-21p.front.right_t.pin1"
|
||||
},
|
||||
"test_pads": {}
|
||||
}
|
||||
48
boards/variants/afw121t.c
Normal file
48
boards/variants/afw121t.c
Normal file
@@ -0,0 +1,48 @@
|
||||
/* This file was auto-generated from afw121t.json using boardgen */
|
||||
|
||||
#include <Arduino.h>
|
||||
|
||||
#ifdef LT_VARIANT_INCLUDE
|
||||
#include LT_VARIANT_INCLUDE
|
||||
#endif
|
||||
|
||||
// clang-format off
|
||||
PinInfo lt_arduino_pin_info_list[PINS_COUNT] = {
|
||||
// D0: PA14, PWM0, SWCLK
|
||||
{PA_14, PIN_GPIO | PIN_IRQ | PIN_PWM | PIN_SWD, PIN_NONE, 0},
|
||||
// D1: PA15, PWM1, SWDIO
|
||||
{PA_15, PIN_GPIO | PIN_IRQ | PIN_PWM | PIN_SWD, PIN_NONE, 0},
|
||||
// D2: PA00, PWM2
|
||||
{PA_0, PIN_GPIO | PIN_IRQ | PIN_PWM, PIN_NONE, 0},
|
||||
// D3: PA12, PWM3
|
||||
{PA_12, PIN_GPIO | PIN_IRQ | PIN_PWM, PIN_NONE, 0},
|
||||
// D4: PA29, UART2_RX, I2C0_SCL, PWM4
|
||||
{PA_29, PIN_GPIO | PIN_IRQ | PIN_PWM | PIN_I2C | PIN_UART, PIN_NONE, 0},
|
||||
// D5: PA05, PWM4, WAKE1
|
||||
{PA_5, PIN_GPIO | PIN_IRQ | PIN_PWM, PIN_NONE, 0},
|
||||
// D6: PA18, UART0_RX, SPI0_SCK, SPI1_SCK, I2C1_SCL, SD_D2, TMR4_TRIG, I2S0_MCK, WAKE0
|
||||
{PA_18, PIN_GPIO | PIN_IRQ | PIN_I2C | PIN_I2S | PIN_SPI | PIN_UART, PIN_NONE, 0},
|
||||
// D7: PA19, ADC1, UART0_CTS, SPI0_CS, SPI1_CS, I2C0_SDA, SD_D3, TMR5_TRIG, I2S0_TX
|
||||
{PA_19, PIN_GPIO | PIN_IRQ | PIN_I2C | PIN_I2S | PIN_SPI | PIN_UART, PIN_NONE, 0},
|
||||
// D8: PA22, UART0_RTS, SPI0_MISO, SPI1_MISO, I2C0_SCL, SD_D0, PWM5, I2S0_WS, WAKE2
|
||||
{PA_22, PIN_GPIO | PIN_IRQ | PIN_PWM | PIN_I2C | PIN_I2S | PIN_SPI | PIN_UART, PIN_NONE, 0},
|
||||
// D9: PA23, UART0_TX, SPI0_MOSI, SPI1_MOSI, I2C1_SDA, SD_D1, PWM0, WAKE3
|
||||
{PA_23, PIN_GPIO | PIN_IRQ | PIN_PWM | PIN_I2C | PIN_SPI | PIN_UART, PIN_NONE, 0},
|
||||
// D10: PA30, UART2_TX, I2C0_SDA, PWM4
|
||||
{PA_30, PIN_GPIO | PIN_IRQ | PIN_PWM | PIN_I2C | PIN_UART, PIN_NONE, 0},
|
||||
};
|
||||
|
||||
PinInfo *lt_arduino_pin_gpio_map[] = {
|
||||
[0] = &(lt_arduino_pin_info_list[2]), // PA_0 (D2)
|
||||
[5] = &(lt_arduino_pin_info_list[5]), // PA_5 (D5)
|
||||
[12] = &(lt_arduino_pin_info_list[3]), // PA_12 (D3)
|
||||
[14] = &(lt_arduino_pin_info_list[0]), // PA_14 (D0)
|
||||
[15] = &(lt_arduino_pin_info_list[1]), // PA_15 (D1)
|
||||
[18] = &(lt_arduino_pin_info_list[6]), // PA_18 (D6)
|
||||
[19] = &(lt_arduino_pin_info_list[7]), // PA_19 (D7)
|
||||
[22] = &(lt_arduino_pin_info_list[8]), // PA_22 (D8)
|
||||
[23] = &(lt_arduino_pin_info_list[9]), // PA_23 (D9)
|
||||
[29] = &(lt_arduino_pin_info_list[4]), // PA_29 (D4)
|
||||
[30] = &(lt_arduino_pin_info_list[10]), // PA_30 (D10)
|
||||
};
|
||||
// clang-format on
|
||||
136
boards/variants/afw121t.h
Normal file
136
boards/variants/afw121t.h
Normal file
@@ -0,0 +1,136 @@
|
||||
/* This file was auto-generated from afw121t.json using boardgen */
|
||||
|
||||
#pragma once
|
||||
|
||||
// clang-format off
|
||||
|
||||
// Pins
|
||||
// ----
|
||||
#define PINS_COUNT 11 // Total GPIO count
|
||||
#define NUM_DIGITAL_PINS 11 // Digital inputs/outputs
|
||||
#define NUM_ANALOG_INPUTS 0 // ADC inputs
|
||||
#define NUM_ANALOG_OUTPUTS 9 // PWM & DAC outputs
|
||||
#define PINS_GPIO_MAX 30 // Last usable GPIO number
|
||||
|
||||
// SPI Interfaces
|
||||
// --------------
|
||||
#define PIN_SPI0_CS 19u // PA_19
|
||||
#define PIN_SPI0_MISO 22u // PA_22
|
||||
#define PIN_SPI0_MOSI 23u // PA_23
|
||||
#define PIN_SPI0_SCK 18u // PA_18
|
||||
#define PIN_SPI1_CS 19u // PA_19
|
||||
#define PIN_SPI1_MISO 22u // PA_22
|
||||
#define PIN_SPI1_MOSI 23u // PA_23
|
||||
#define PIN_SPI1_SCK 18u // PA_18
|
||||
#define PINS_SPI0_CS (pin_size_t[]){19u}
|
||||
#define PINS_SPI0_MISO (pin_size_t[]){22u}
|
||||
#define PINS_SPI0_MOSI (pin_size_t[]){23u}
|
||||
#define PINS_SPI0_SCK (pin_size_t[]){18u}
|
||||
#define PINS_SPI1_CS (pin_size_t[]){19u}
|
||||
#define PINS_SPI1_MISO (pin_size_t[]){22u}
|
||||
#define PINS_SPI1_MOSI (pin_size_t[]){23u}
|
||||
#define PINS_SPI1_SCK (pin_size_t[]){18u}
|
||||
|
||||
// Wire Interfaces
|
||||
// ---------------
|
||||
#define PIN_WIRE0_SCL_0 22u // PA_22
|
||||
#define PIN_WIRE0_SCL_1 29u // PA_29
|
||||
#define PIN_WIRE0_SDA_0 19u // PA_19
|
||||
#define PIN_WIRE0_SDA_1 30u // PA_30
|
||||
#define PIN_WIRE1_SCL 18u // PA_18
|
||||
#define PIN_WIRE1_SDA 23u // PA_23
|
||||
#define PINS_WIRE0_SCL (pin_size_t[]){22u, 29u}
|
||||
#define PINS_WIRE0_SDA (pin_size_t[]){19u, 30u}
|
||||
#define PINS_WIRE1_SCL (pin_size_t[]){18u}
|
||||
#define PINS_WIRE1_SDA (pin_size_t[]){23u}
|
||||
|
||||
// Serial ports
|
||||
// ------------
|
||||
#define PIN_SERIAL0_CTS 19u // PA_19
|
||||
#define PIN_SERIAL0_RTS 22u // PA_22
|
||||
#define PIN_SERIAL0_RX 18u // PA_18
|
||||
#define PIN_SERIAL0_TX 23u // PA_23
|
||||
#define PIN_SERIAL2_RX 29u // PA_29
|
||||
#define PIN_SERIAL2_TX 30u // PA_30
|
||||
#define PINS_SERIAL0_CTS (pin_size_t[]){19u}
|
||||
#define PINS_SERIAL0_RTS (pin_size_t[]){22u}
|
||||
#define PINS_SERIAL0_RX (pin_size_t[]){18u}
|
||||
#define PINS_SERIAL0_TX (pin_size_t[]){23u}
|
||||
#define PINS_SERIAL2_RX (pin_size_t[]){29u}
|
||||
#define PINS_SERIAL2_TX (pin_size_t[]){30u}
|
||||
|
||||
// Pin function macros
|
||||
// -------------------
|
||||
#define PIN_ADC1 19u // PA_19
|
||||
#define PIN_CS0 19u // PA_19
|
||||
#define PIN_CS1 19u // PA_19
|
||||
#define PIN_CTS0 19u // PA_19
|
||||
#define PIN_MISO0 22u // PA_22
|
||||
#define PIN_MISO1 22u // PA_22
|
||||
#define PIN_MOSI0 23u // PA_23
|
||||
#define PIN_MOSI1 23u // PA_23
|
||||
#define PIN_PA00 0u // PA_0
|
||||
#define PIN_PA05 5u // PA_5
|
||||
#define PIN_PA12 12u // PA_12
|
||||
#define PIN_PA14 14u // PA_14
|
||||
#define PIN_PA15 15u // PA_15
|
||||
#define PIN_PA18 18u // PA_18
|
||||
#define PIN_PA19 19u // PA_19
|
||||
#define PIN_PA22 22u // PA_22
|
||||
#define PIN_PA23 23u // PA_23
|
||||
#define PIN_PA29 29u // PA_29
|
||||
#define PIN_PA30 30u // PA_30
|
||||
#define PIN_PWM1 15u // PA_15
|
||||
#define PIN_PWM2 0u // PA_0
|
||||
#define PIN_PWM3 12u // PA_12
|
||||
#define PIN_PWM4 29u // PA_29
|
||||
#define PIN_PWM5 22u // PA_22
|
||||
#define PIN_RTS0 22u // PA_22
|
||||
#define PIN_RX0 18u // PA_18
|
||||
#define PIN_RX2 29u // PA_29
|
||||
#define PIN_SCK0 18u // PA_18
|
||||
#define PIN_SCK1 18u // PA_18
|
||||
#define PIN_SCL1 18u // PA_18
|
||||
#define PIN_SDA1 23u // PA_23
|
||||
#define PIN_TX0 23u // PA_23
|
||||
#define PIN_TX2 30u // PA_30
|
||||
|
||||
// Port availability
|
||||
// -----------------
|
||||
#define HAS_SERIAL0 1
|
||||
#define HAS_SERIAL2 1
|
||||
#define HAS_SPI0 1
|
||||
#define HAS_SPI1 1
|
||||
#define HAS_WIRE0 1
|
||||
#define HAS_WIRE1 1
|
||||
#define SERIAL_INTERFACES_COUNT 2
|
||||
#define SPI_INTERFACES_COUNT 2
|
||||
#define WIRE_INTERFACES_COUNT 2
|
||||
|
||||
// Arduino pin names
|
||||
// -----------------
|
||||
#define PIN_D0 14u // PA_14
|
||||
#define PIN_D1 15u // PA_15
|
||||
#define PIN_D2 0u // PA_0
|
||||
#define PIN_D3 12u // PA_12
|
||||
#define PIN_D4 29u // PA_29
|
||||
#define PIN_D5 5u // PA_5
|
||||
#define PIN_D6 18u // PA_18
|
||||
#define PIN_D7 19u // PA_19
|
||||
#define PIN_D8 22u // PA_22
|
||||
#define PIN_D9 23u // PA_23
|
||||
#define PIN_D10 30u // PA_30
|
||||
|
||||
// Static pin names
|
||||
// ----------------
|
||||
static const unsigned char D0 = PIN_D0;
|
||||
static const unsigned char D1 = PIN_D1;
|
||||
static const unsigned char D2 = PIN_D2;
|
||||
static const unsigned char D3 = PIN_D3;
|
||||
static const unsigned char D4 = PIN_D4;
|
||||
static const unsigned char D5 = PIN_D5;
|
||||
static const unsigned char D6 = PIN_D6;
|
||||
static const unsigned char D7 = PIN_D7;
|
||||
static const unsigned char D8 = PIN_D8;
|
||||
static const unsigned char D9 = PIN_D9;
|
||||
static const unsigned char D10 = PIN_D10;
|
||||
@@ -427,8 +427,8 @@ env.Replace(
|
||||
# same OTA images for flasher and device
|
||||
f"{image_firmware_is},{image_firmware_is}=device:ota1,ota2;flasher:ota1,ota2",
|
||||
# having flashed an application image, update the bootloader and partition table (incl. keys)
|
||||
f"{image_bootloader}=device:boot;flasher:boot",
|
||||
f"{image_part_table}=device:part_table;flasher:part_table",
|
||||
f"{image_bootloader},{image_bootloader}=flasher:boot,boot",
|
||||
f"{image_part_table},{image_part_table}=flasher:part_table,part_table",
|
||||
# clearing headers of the "other" OTA image (hence the indexes are swapped)
|
||||
f"{image_ota_clear},{image_ota_clear}=device:ota2,ota1;flasher:ota2,ota1",
|
||||
],
|
||||
|
||||
@@ -20,8 +20,6 @@ env.ParseCustomOptions(platform)
|
||||
env.ParseCustomFlashLayout(platform, board)
|
||||
# Add flash layout C defines
|
||||
env.AddFlashLayout(board)
|
||||
# Write custom header options
|
||||
env.ApplyCustomOptions(platform)
|
||||
# Export board manifest for ltchiptool
|
||||
env.ExportBoardData(board)
|
||||
# Print information about versions and custom options
|
||||
|
||||
@@ -184,6 +184,9 @@ class LibraryQueue:
|
||||
else:
|
||||
self.env.Append(CPPPATH=self.includes)
|
||||
|
||||
# prepend headers with custom options
|
||||
self.env.ApplyCustomOptions(self.env.PioPlatform())
|
||||
|
||||
# clone the environment for the whole library queue
|
||||
queue_env = self.env.Clone()
|
||||
# add private options to the cloned environment
|
||||
|
||||
@@ -6,9 +6,9 @@
|
||||
#include <sdk_private.h>
|
||||
|
||||
typedef struct {
|
||||
RingBuffer buf;
|
||||
SerialRingBuffer buf;
|
||||
} SerialData;
|
||||
|
||||
#define DATA ((SerialData *)data)
|
||||
#define BUF (DATA->buf)
|
||||
#define pBUF ((RingBuffer *)param)
|
||||
#define pBUF ((SerialRingBuffer *)param)
|
||||
|
||||
@@ -27,6 +27,40 @@ static void wifiEventTask(void *arg) {
|
||||
}
|
||||
}
|
||||
|
||||
// There is a race condition, when we have an event about a successful
|
||||
// connection but no SSID yet returned by BDK. Even a single millisecond
|
||||
// delay should prevent this from happening. It's better to waste a bit
|
||||
// of time here than to lose a valid connection down the line.
|
||||
static String waitForValidSSID(WiFiClass *pWiFi) {
|
||||
String result;
|
||||
|
||||
// Read the initial value that might just be available already.
|
||||
result = pWiFi->SSID();
|
||||
|
||||
if (!result.length()) {
|
||||
std::size_t i = 0;
|
||||
for (; i < 10; i++) {
|
||||
// Delay and query again.
|
||||
delay(1);
|
||||
result = pWiFi->SSID();
|
||||
|
||||
if (result.length()) {
|
||||
LT_DM(WIFI, "Got valid SSID after %u delays", i + 1);
|
||||
break;
|
||||
}
|
||||
|
||||
// It's a good idea to yield.
|
||||
yield();
|
||||
}
|
||||
|
||||
if (!result.length()) {
|
||||
LT_WM(WIFI, "Could not obtain a valid SSID after %u delays", i);
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
void wifiEventSendArduino(EventId event) {
|
||||
event = (EventId)(RW_EVT_ARDUINO | event);
|
||||
wifiStatusCallback((rw_evt_type *)&event);
|
||||
@@ -52,11 +86,6 @@ void wifiEventHandler(rw_evt_type event) {
|
||||
|
||||
LT_DM(WIFI, "BK event %u", event);
|
||||
|
||||
if (event <= RW_EVT_STA_GOT_IP)
|
||||
pDATA->lastStaEvent = event;
|
||||
else
|
||||
pDATA->lastApEvent = event;
|
||||
|
||||
EventId eventId;
|
||||
EventInfo eventInfo;
|
||||
String ssid;
|
||||
@@ -103,7 +132,7 @@ void wifiEventHandler(rw_evt_type event) {
|
||||
|
||||
case RW_EVT_STA_CONNECTED:
|
||||
eventId = ARDUINO_EVENT_WIFI_STA_CONNECTED;
|
||||
ssid = pWiFi->SSID();
|
||||
ssid = waitForValidSSID(pWiFi);
|
||||
eventInfo.wifi_sta_connected.ssid_len = ssid.length();
|
||||
eventInfo.wifi_sta_connected.channel = pWiFi->channel();
|
||||
eventInfo.wifi_sta_connected.authmode = pWiFi->getEncryption();
|
||||
@@ -145,5 +174,13 @@ void wifiEventHandler(rw_evt_type event) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Publish state update only after the event data is retrieved.
|
||||
// This relates to the race condition with RW_EVT_STA_CONNECTED.
|
||||
if (event <= RW_EVT_STA_GOT_IP) {
|
||||
pDATA->lastStaEvent = event;
|
||||
} else {
|
||||
pDATA->lastApEvent = event;
|
||||
}
|
||||
|
||||
pWiFi->postEvent(eventId, eventInfo);
|
||||
}
|
||||
|
||||
@@ -80,7 +80,30 @@ IPAddress WiFiClass::hostByName(const char *hostname) {
|
||||
ip_addr_t ip;
|
||||
int ret = netconn_gethostbyname(hostname, &ip);
|
||||
if (ret == ERR_OK) {
|
||||
return ip.addr;
|
||||
#ifdef CONFIG_IPV6
|
||||
if (IP_IS_V6(&ip)) {
|
||||
ip6_addr_t *ip6 = ip_2_ip6(&ip);
|
||||
return IPAddress(
|
||||
IP6_ADDR_BLOCK1(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK1(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK2(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK2(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK3(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK3(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK4(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK4(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK5(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK5(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK6(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK6(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK7(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK7(ip6) & 0xff,
|
||||
IP6_ADDR_BLOCK8(ip6) >> 8,
|
||||
IP6_ADDR_BLOCK8(ip6) & 0xff
|
||||
);
|
||||
}
|
||||
#endif
|
||||
return IPAddress(ip_addr_get_ip4_u32(&ip));
|
||||
}
|
||||
return IPAddress();
|
||||
}
|
||||
|
||||
@@ -2,8 +2,13 @@
|
||||
|
||||
#include "WiFiPrivate.h"
|
||||
|
||||
WiFiStatus
|
||||
WiFiClass::begin(const char *ssid, const char *passphrase, int32_t channel, const uint8_t *bssid, bool connect) {
|
||||
WiFiStatus WiFiClass::begin(
|
||||
const char *ssid,
|
||||
const char *passphrase,
|
||||
int32_t channel,
|
||||
const uint8_t *bssid,
|
||||
bool connect
|
||||
) {
|
||||
if (!enableSTA(true))
|
||||
return WL_CONNECT_FAILED;
|
||||
if (!validate(ssid, passphrase))
|
||||
@@ -246,3 +251,41 @@ WiFiAuthMode WiFiClass::getEncryption() {
|
||||
STA_GET_LINK_STATUS_RETURN(WIFI_AUTH_INVALID);
|
||||
return securityTypeToAuthMode(LINK_STATUS.security);
|
||||
}
|
||||
#ifdef CONFIG_IPV6
|
||||
bool WiFiClass::enableIpV6() {
|
||||
return true;
|
||||
}
|
||||
|
||||
IPv6Address WiFiClass::localIPv6() {
|
||||
struct netif *ifs = (struct netif *)net_get_sta_handle();
|
||||
std::vector<IPv6Address> result;
|
||||
struct wlan_ip_config addr;
|
||||
int nr_addresses = 0;
|
||||
|
||||
if (sta_ip_is_start())
|
||||
nr_addresses = net_get_if_ipv6_pref_addr(&addr, ifs);
|
||||
|
||||
for (int i = 0; i < nr_addresses; i++) {
|
||||
if (ip6_addr_islinklocal(&addr.ipv6[i]))
|
||||
return IPv6Address(addr.ipv6[i].addr);
|
||||
}
|
||||
|
||||
return IPv6Address();
|
||||
}
|
||||
|
||||
std::vector<IPv6Address> WiFiClass::allLocalIPv6() {
|
||||
struct netif *ifs = (struct netif *)net_get_sta_handle();
|
||||
std::vector<IPv6Address> result;
|
||||
struct wlan_ip_config addr;
|
||||
int nr_addresses = 0;
|
||||
|
||||
if (sta_ip_is_start())
|
||||
nr_addresses = net_get_if_ipv6_pref_addr(&addr, ifs);
|
||||
|
||||
for (int i = 0; i < nr_addresses; i++) {
|
||||
result.push_back(IPv6Address(addr.ipv6[i].addr));
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -9,19 +9,19 @@ static void irqHandler(unsigned char gpio) {
|
||||
PinData *data = pinData(pin);
|
||||
if (!data->irqHandler)
|
||||
return;
|
||||
if (data->irqChange) {
|
||||
if (data->gpioMode == INPUT_PULLDOWN) {
|
||||
data->gpioMode = INPUT_PULLUP;
|
||||
gpio_int_enable(pin->gpio, GPIO_INT_LEVEL_FALLING, irqHandler);
|
||||
} else if (data->gpioMode == INPUT_PULLUP) {
|
||||
data->gpioMode = INPUT_PULLDOWN;
|
||||
gpio_int_enable(pin->gpio, GPIO_INT_LEVEL_RISING, irqHandler);
|
||||
}
|
||||
}
|
||||
if (!data->irqParam)
|
||||
((voidFuncPtr)data->irqHandler)();
|
||||
else
|
||||
((voidFuncPtrParam)data->irqHandler)(data->irqParam);
|
||||
if (data->irqChange) {
|
||||
if (data->irqMode == RISING) {
|
||||
data->irqMode = FALLING;
|
||||
gpio_int_enable(pin->gpio, GPIO_INT_LEVEL_FALLING, irqHandler);
|
||||
} else {
|
||||
data->irqMode = RISING;
|
||||
gpio_int_enable(pin->gpio, GPIO_INT_LEVEL_RISING, irqHandler);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void attachInterruptParam(pin_size_t interruptNumber, voidFuncPtrParam callback, PinStatus mode, void *param) {
|
||||
@@ -52,7 +52,13 @@ void attachInterruptParam(pin_size_t interruptNumber, voidFuncPtrParam callback,
|
||||
event = GPIO_INT_LEVEL_RISING;
|
||||
break;
|
||||
case CHANGE:
|
||||
event = GPIO_INT_LEVEL_FALLING;
|
||||
if (gpio_input(pin->gpio)) {
|
||||
event = GPIO_INT_LEVEL_FALLING;
|
||||
mode = FALLING;
|
||||
} else {
|
||||
event = GPIO_INT_LEVEL_RISING;
|
||||
mode = RISING;
|
||||
}
|
||||
change = true;
|
||||
break;
|
||||
default:
|
||||
|
||||
@@ -19,6 +19,14 @@ void lt_deep_sleep_unset_gpio(uint32_t gpio_index_map) {
|
||||
deep_sleep_param.gpio_index_map &= (~gpio_index_map);
|
||||
}
|
||||
|
||||
void lt_deep_sleep_keep_floating_gpio(uint32_t gpio_index_map, bool enabled) {
|
||||
if (enabled) {
|
||||
deep_sleep_param.gpio_stay_lo_map |= gpio_index_map;
|
||||
} else {
|
||||
deep_sleep_param.gpio_stay_lo_map &= (~gpio_index_map);
|
||||
}
|
||||
}
|
||||
|
||||
void lt_deep_sleep_config_timer(uint32_t sleep_duration_ms) {
|
||||
deep_sleep_param.wake_up_way |= PS_DEEP_WAKEUP_RTC;
|
||||
uint64_t sleep_ticks = 32.768 * sleep_duration_ms;
|
||||
@@ -33,7 +41,7 @@ void lt_deep_sleep_enter() {
|
||||
bk_misc_update_set_type(RESET_SOURCE_DEEPPS_GPIO);
|
||||
GLOBAL_INT_DECLARATION();
|
||||
GLOBAL_INT_DISABLE();
|
||||
sctrl_enter_rtos_deep_sleep((PS_DEEP_CTRL_PARAM *)&deep_sleep_param);
|
||||
sctrl_enter_rtos_deep_sleep_fix((PS_DEEP_CTRL_PARAM *)&deep_sleep_param);
|
||||
ps_delay(500);
|
||||
GLOBAL_INT_RESTORE();
|
||||
}
|
||||
|
||||
@@ -10,8 +10,10 @@
|
||||
#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
|
||||
#define MEMP_NUM_UDP_PCB (MAX_SOCKETS_UDP + 2 + 1)
|
||||
|
||||
#ifndef CONFIG_IPV6
|
||||
#define ip_addr ip4_addr
|
||||
#define ip_addr_t ip4_addr_t
|
||||
#endif
|
||||
|
||||
// increase TCP/IP thread stack size (was 512)
|
||||
#undef TCPIP_THREAD_STACKSIZE
|
||||
|
||||
9
cores/beken-72xx/base/config/tls_config.h
Normal file
9
cores/beken-72xx/base/config/tls_config.h
Normal file
@@ -0,0 +1,9 @@
|
||||
/* Copyright (c) Kuba Szczodrzyński 2024-05-18. */
|
||||
|
||||
#pragma once
|
||||
|
||||
#include_next "tls_config.h"
|
||||
|
||||
// allow more entropy sources
|
||||
#undef MBEDTLS_ENTROPY_MAX_SOURCES
|
||||
#define MBEDTLS_ENTROPY_MAX_SOURCES 10
|
||||
431
cores/beken-72xx/base/fixups/sys_ctrl.c
Normal file
431
cores/beken-72xx/base/fixups/sys_ctrl.c
Normal file
@@ -0,0 +1,431 @@
|
||||
#include "include.h"
|
||||
#include "sys_ctrl.h"
|
||||
|
||||
#include "flash_pub.h"
|
||||
#include "power_save_pub.h"
|
||||
#include "gpio_pub.h"
|
||||
#include "reg_rc.h"
|
||||
#include "manual_ps_pub.h"
|
||||
|
||||
// usage:
|
||||
// extern void sctrl_enter_rtos_deep_sleep_fix(PS_DEEP_CTRL_PARAM *deep_param);
|
||||
|
||||
static void sctrl_mac_ahb_slave_clock_disable(void)
|
||||
{
|
||||
UINT32 reg;
|
||||
#if (CFG_SOC_NAME == SOC_BK7271)
|
||||
reg = REG_READ(SCTRL_CONTROL);
|
||||
reg &= ~MAC_HCLK_EN_BIT;
|
||||
REG_WRITE(SCTRL_CONTROL, reg);
|
||||
#else
|
||||
reg = REG_READ(SCTRL_MODEM_CORE_RESET_PHY_HCLK);
|
||||
reg &= ~MAC_HCLK_EN_BIT;
|
||||
REG_WRITE(SCTRL_MODEM_CORE_RESET_PHY_HCLK, reg);
|
||||
#endif
|
||||
}
|
||||
|
||||
// This is a patched version, where `gpio_stay_*_map` arguments are actually
|
||||
// taken into account as intended. The offical doc says that they control
|
||||
// whether the original voltage should 'stay' (float) instead of configuring
|
||||
// pins to pullup/pulldown.
|
||||
//
|
||||
// https://docs.bekencorp.com/sdk_3.0.x/bk7238/build/en/latest/developer-guide/power_save/sleep_test.html
|
||||
void sctrl_enter_rtos_deep_sleep_fix(PS_DEEP_CTRL_PARAM *deep_param)
|
||||
{
|
||||
DD_HANDLE flash_hdl;
|
||||
UINT32 status;
|
||||
UINT32 param;
|
||||
UINT32 reg;
|
||||
UINT32 i;
|
||||
|
||||
uart_wait_tx_over();
|
||||
|
||||
/* close all peri clock*/
|
||||
REG_WRITE(ICU_PERI_CLK_PWD, 0xfffff); // icu: 0x2;
|
||||
|
||||
#if CFG_USE_UART2
|
||||
uart2_exit();
|
||||
#endif
|
||||
#if CFG_USE_UART1
|
||||
uart1_exit();
|
||||
#endif
|
||||
|
||||
#if (CFG_SOC_NAME == SOC_BK7231U) || (SOC_BK7231N == CFG_SOC_NAME)
|
||||
reg = REG_READ(SCTRL_LOW_PWR_CLK);
|
||||
reg &=~(LPO_CLK_MUX_MASK);
|
||||
reg |=(LPO_SRC_ROSC << LPO_CLK_MUX_POSI);
|
||||
REG_WRITE(SCTRL_LOW_PWR_CLK, reg);
|
||||
|
||||
REG_WRITE(SCTRL_ROSC_CAL, 0x75);
|
||||
REG_WRITE(SCTRL_ROSC_CAL, 0x77);
|
||||
#else
|
||||
/*ana_reg set*/
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL0, 0x7819a59b);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL1, 0x7819a59b);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL2, 0x84036080);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL3, 0x180004a0);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL4, 0x84200e52);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL5, 0x3b13b13b);
|
||||
#if (CFG_SOC_NAME != SOC_BK7231)
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL6, 0xb09350);
|
||||
#endif
|
||||
#if (CFG_SOC_NAME == SOC_BK7221U)
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL7, 0x441a7f0);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL8, 0x3b187c);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL9, 0x82204007);
|
||||
REG_WRITE(SCTRL_ANALOG_CTRL10, 0x80801432);
|
||||
#endif
|
||||
#endif
|
||||
ps_delay(10);
|
||||
/*clear int*/
|
||||
REG_WRITE(ICU_INTERRUPT_ENABLE, 0);
|
||||
|
||||
extern void gpio_ops_disable_filter(void);
|
||||
gpio_ops_disable_filter();
|
||||
|
||||
/* disable gpio0~31*/
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_EN,0x0); //sys_ctrl : 0x48;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_INT_STATUS,0xFFFFFFFF); //sys_ctrl : 0x4a;
|
||||
|
||||
#if (CFG_SOC_NAME != SOC_BK7231N)
|
||||
/* disable gpio32~39*/
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_EN1,0x0); //sys_ctrl : 0x51;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_INT_STATUS1,0xFF); //sys_ctrl : 0x53;
|
||||
#endif
|
||||
|
||||
REG_WRITE(SCTRL_BLOCK_EN_MUX, 0x0); //sys_ctrl : 0x4F;
|
||||
|
||||
/* ROSC_TIMER_int_clear*/
|
||||
reg = REG_READ(SCTRL_ROSC_TIMER);
|
||||
reg = reg| ROSC_TIMER_INT_STATUS_BIT ;
|
||||
REG_WRITE(SCTRL_ROSC_TIMER,reg); //sys_ctrl : 0x47;
|
||||
|
||||
/*ROSC_TIMER close */
|
||||
reg = REG_READ(SCTRL_ROSC_TIMER);
|
||||
reg = reg & (~ROSC_TIMER_ENABLE_BIT); //'C'
|
||||
REG_WRITE(SCTRL_ROSC_TIMER,reg);
|
||||
|
||||
reg = REG_READ(SCTRL_LOW_PWR_CLK);
|
||||
reg &=~(LPO_CLK_MUX_MASK);
|
||||
if(deep_param->lpo_32k_src == LPO_SELECT_32K_XTAL)
|
||||
{
|
||||
reg |=(LPO_SRC_32K_XTAL << LPO_CLK_MUX_POSI);
|
||||
}
|
||||
else
|
||||
{
|
||||
reg |=(LPO_SRC_ROSC << LPO_CLK_MUX_POSI);
|
||||
}
|
||||
|
||||
REG_WRITE(SCTRL_LOW_PWR_CLK, reg); //sys_ctrl : 0x40;
|
||||
|
||||
/* close all peri int*/
|
||||
// REG_WRITE(ICU_INTERRUPT_ENABLE, 0);
|
||||
|
||||
/* MAC pwd*/
|
||||
REG_WRITE(SCTRL_PWR_MAC_MODEM, MAC_PWD << MAC_PWD_POSI); //sys_ctrl : 0x43;
|
||||
|
||||
sctrl_mac_ahb_slave_clock_disable();
|
||||
|
||||
/* Mac Subsystem clock 480m disable*/
|
||||
reg = REG_READ(SCTRL_CONTROL);
|
||||
REG_WRITE(SCTRL_CONTROL, reg | MAC_CLK480M_PWD_BIT);
|
||||
|
||||
/* Modem pwd*/
|
||||
REG_WRITE(SCTRL_PWR_MAC_MODEM, MODEM_PWD << MODEM_PWD_POSI);
|
||||
|
||||
/* Modem AHB clock disable*/
|
||||
reg = REG_READ(SCTRL_MODEM_CORE_RESET_PHY_HCLK);
|
||||
reg &= ~PHY_HCLK_EN_BIT;
|
||||
REG_WRITE(SCTRL_MODEM_CORE_RESET_PHY_HCLK, reg);
|
||||
|
||||
/* Modem Subsystem clock 480m disable*/
|
||||
reg = REG_READ(SCTRL_CONTROL);
|
||||
REG_WRITE(SCTRL_CONTROL, reg | MODEM_CLK480M_PWD_BIT);
|
||||
|
||||
/* Flash 26MHz clock select dco clock*/
|
||||
flash_hdl = ddev_open(FLASH_DEV_NAME, &status, 0);
|
||||
ASSERT(DD_HANDLE_UNVALID != flash_hdl);
|
||||
ddev_control(flash_hdl, CMD_FLASH_SET_DCO, 0);
|
||||
|
||||
/* MCLK(main clock) select:dco*/ /* MCLK division*/
|
||||
reg = REG_READ(SCTRL_CONTROL);
|
||||
reg &= ~(MCLK_MUX_MASK << MCLK_MUX_POSI);
|
||||
reg &= ~(MCLK_DIV_MASK << MCLK_DIV_POSI);
|
||||
REG_WRITE(SCTRL_CONTROL, reg); //0x02
|
||||
|
||||
if(deep_param->lpo_32k_src == LPO_SELECT_32K_XTAL)
|
||||
{
|
||||
reg = REG_READ(SCTRL_CONTROL);
|
||||
reg =((reg & (~0xF0)) | (0<<4));
|
||||
reg =((reg & (~0x03)) | (0<<MCLK_MUX_POSI));
|
||||
reg =((reg & (~0x100)) | FLASH_26M_MUX_BIT);
|
||||
REG_WRITE(SCTRL_CONTROL,reg); //sys_ctrl : 0x02;
|
||||
}
|
||||
|
||||
ps_delay(10);
|
||||
|
||||
reg = 0x0;
|
||||
reg = (reg &(~(BLOCK_EN_WORD_MASK << 20))&(~(0x7FFFUL<<5)) &(~(0x01UL<<1)));
|
||||
reg = (reg |(BLOCK_EN_WORD_PWD<< 20 )|BLK_EN_FLASH|BLK_EN_ROSC32K|BLK_EN_DIGITAL_CORE|BLK_EN_ANALOG_SYS_LDO);
|
||||
if(deep_param->lpo_32k_src == LPO_SELECT_32K_XTAL)
|
||||
{
|
||||
reg = (reg |BLK_EN_32K_XTAL|BLK_EN_26M_XTAL);
|
||||
}
|
||||
REG_WRITE(SCTRL_BLOCK_EN_CFG, reg); //sys_ctrl : 0x4B; //'E'
|
||||
|
||||
#if (CFG_SOC_NAME != SOC_BK7231U) && (SOC_BK7231N != CFG_SOC_NAME)
|
||||
reg = REG_READ(SCTRL_ROSC_CAL); //ROSC Calibration disable
|
||||
reg =(reg & (~0x01));
|
||||
REG_WRITE(SCTRL_ROSC_CAL, reg);
|
||||
#endif
|
||||
|
||||
for(i=0; i<GPIONUM; i++)
|
||||
{
|
||||
#if (CFG_SOC_NAME == SOC_BK7231N)
|
||||
if(((i > GPIO1) && (i < GPIO6))
|
||||
|| ((i > GPIO11) && (i < GPIO14))
|
||||
|| ((i > GPIO17) && (i < GPIO20))
|
||||
|| ((i > GPIO24) && (i < GPIO26))
|
||||
|| ((i > GPIO26) && (i < GPIO28)))
|
||||
{
|
||||
continue;
|
||||
}
|
||||
#endif
|
||||
if(((i < BITS_INT)&&(deep_param->gpio_stay_lo_map & (0x01UL << i)))
|
||||
||((deep_param->gpio_index_map & (0x01UL << i)))
|
||||
||((deep_param->gpio_last_index_map & (0x01UL << i)))
|
||||
||((i >= BITS_INT)&&(deep_param->gpio_stay_hi_map & (0x01UL << (i - BITS_INT)))) )
|
||||
{
|
||||
continue;
|
||||
}
|
||||
param = GPIO_CFG_PARAM(i, GMODE_DEEP_PS); /*set gpio 0~39 as high impendance*/
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
}
|
||||
|
||||
if (((deep_param->wake_up_way & PS_DEEP_WAKEUP_RTC))
|
||||
&& (deep_param->sleep_time!= 0xffffffff))
|
||||
{
|
||||
/*ROSC_TIMER init*/
|
||||
#if (CFG_SOC_NAME != SOC_BK7231)
|
||||
reg = (deep_param->sleep_time >> 16)& 0xffff; //'A'
|
||||
REG_WRITE(SCTRL_ROSC_TIMER_H,reg);
|
||||
#endif
|
||||
|
||||
reg = REG_READ(SCTRL_ROSC_TIMER);
|
||||
reg |= ROSC_TIMER_INT_STATUS_BIT; //'C'
|
||||
REG_WRITE(SCTRL_ROSC_TIMER,reg); //sys_ctrl : 0x47;
|
||||
|
||||
reg = REG_READ(SCTRL_ROSC_TIMER);
|
||||
reg &= ~(ROSC_TIMER_PERIOD_MASK << ROSC_TIMER_PERIOD_POSI);
|
||||
reg |= ((deep_param->sleep_time & ROSC_TIMER_PERIOD_MASK) << ROSC_TIMER_PERIOD_POSI);
|
||||
REG_WRITE(SCTRL_ROSC_TIMER,reg); //sys_ctrl : 0x47; //'D'
|
||||
|
||||
reg = REG_READ(SCTRL_ROSC_TIMER);
|
||||
reg |= ROSC_TIMER_ENABLE_BIT;
|
||||
REG_WRITE(SCTRL_ROSC_TIMER,reg); //sys_ctrl : 0x47; //'B'
|
||||
|
||||
if(deep_param->lpo_32k_src == LPO_SELECT_32K_XTAL)
|
||||
{
|
||||
REG_WRITE(SCTRL_CONTROL, 0x330100);
|
||||
REG_WRITE(SCTRL_BLOCK_EN_CFG, (0x15D|(0xA5C<<20)));
|
||||
REG_WRITE(SCTRL_ROSC_CAL, 0x30);
|
||||
REG_WRITE(SCTRL_LOW_PWR_CLK, 0x01);
|
||||
REG_WRITE(SCTRL_MODEM_CORE_RESET_PHY_HCLK, 0x03);
|
||||
REG_WRITE(SCTRL_CLK_GATING, 0x1ff);
|
||||
}
|
||||
}
|
||||
|
||||
#if ((CFG_SOC_NAME != SOC_BK7231N) && (CFG_SOC_NAME != SOC_BK7236))
|
||||
if ((deep_param->wake_up_way & PS_DEEP_WAKEUP_GPIO))
|
||||
{
|
||||
for (i = 0; i < BITS_INT; i++)
|
||||
{
|
||||
#if(BITS_INT > GPIONUM)
|
||||
if(i >= GPIONUM)
|
||||
{
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
if (deep_param->gpio_index_map & (0x01UL << i)) /*set gpio 0~31 mode*/
|
||||
{
|
||||
if( deep_param->gpio_edge_map & (0x01UL << i)) //0:high,1:low.
|
||||
{
|
||||
if (deep_param->gpio_stay_lo_map & (0x01UL << i)) {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT);
|
||||
} else {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT_PULLUP);
|
||||
}
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
if(0x1 != (UINT32)gpio_ctrl( CMD_GPIO_INPUT, &i))
|
||||
{ /*check gpio really input value,to correct wrong edge setting*/
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT);
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
deep_param->gpio_edge_map &= ~(0x01UL << i);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (deep_param->gpio_stay_lo_map & (0x01UL << i)) {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT);
|
||||
} else {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT_PULLDOWN);
|
||||
}
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
if(0x0 != (UINT32)gpio_ctrl( CMD_GPIO_INPUT, &i))
|
||||
{ /*check gpio really input value,to correct wrong edge setting*/
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT);
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
deep_param->gpio_edge_map |= (0x01UL << i);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < (GPIONUM - BITS_INT); i++)
|
||||
{
|
||||
if (deep_param->gpio_last_index_map & (0x01UL << i)) /*set gpio 32~39 mode*/
|
||||
{
|
||||
if( deep_param->gpio_last_edge_map & (0x01UL << i))
|
||||
{
|
||||
if (deep_param->gpio_stay_hi_map & (0x01UL << (i - BITS_INT))) {
|
||||
param = GPIO_CFG_PARAM(i + BITS_INT, GMODE_INPUT);
|
||||
} else {
|
||||
param = GPIO_CFG_PARAM(i + BITS_INT, GMODE_INPUT_PULLUP);
|
||||
}
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
reg = i + BITS_INT;
|
||||
if(0x1 != (UINT32)gpio_ctrl( CMD_GPIO_INPUT, ®))
|
||||
{ /*check gpio really input value,to correct wrong edge setting*/
|
||||
param = GPIO_CFG_PARAM(i + BITS_INT, GMODE_INPUT);
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
deep_param->gpio_last_edge_map &= ~(0x01UL << i);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (deep_param->gpio_stay_hi_map & (0x01UL << (i - BITS_INT))) {
|
||||
param = GPIO_CFG_PARAM(i + BITS_INT, GMODE_INPUT);
|
||||
} else {
|
||||
param = GPIO_CFG_PARAM(i + BITS_INT, GMODE_INPUT_PULLDOWN);
|
||||
}
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
reg = i + BITS_INT;
|
||||
if(0x0 != (UINT32)gpio_ctrl( CMD_GPIO_INPUT, ®))
|
||||
{ /*check gpio really input value,to correct wrong edge setting*/
|
||||
param = GPIO_CFG_PARAM(i + BITS_INT, GMODE_INPUT);
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
deep_param->gpio_last_edge_map |= (0x01UL << i);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* set gpio 0~31 mode*/
|
||||
reg = 0xFFFFFFFF;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_INT_STATUS,reg);
|
||||
reg = deep_param->gpio_edge_map;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_TYPE,reg);
|
||||
reg = deep_param->gpio_index_map;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_EN,reg);
|
||||
|
||||
/* set gpio 31~32 mode*/
|
||||
reg = 0xFF;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_INT_STATUS1,reg);
|
||||
|
||||
reg = deep_param->gpio_last_edge_map;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_TYPE1,reg);
|
||||
|
||||
reg = deep_param->gpio_last_index_map;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_EN1,reg);
|
||||
}
|
||||
#elif ((CFG_SOC_NAME == SOC_BK7231N) || (CFG_SOC_NAME == SOC_BK7236))
|
||||
if(( deep_param->wake_up_way & PS_DEEP_WAKEUP_GPIO ))
|
||||
{
|
||||
for ( i = 0; i < BITS_INT; i++ )
|
||||
{
|
||||
#if(BITS_INT > GPIONUM)
|
||||
if( i >= GPIONUM )
|
||||
{
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
if((( i > GPIO1 ) && ( i < GPIO6 ))
|
||||
|| (( i > GPIO11 ) && ( i < GPIO14 ))
|
||||
|| (( i > GPIO17 ) && ( i < GPIO20 ))
|
||||
|| (( i > GPIO24 ) && ( i < GPIO26 ))
|
||||
|| (( i > GPIO26 ) && ( i < GPIO28 )))
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
if ( deep_param->gpio_index_map & ( 0x01UL << i ))
|
||||
{
|
||||
int type_h,type_l;
|
||||
type_l = deep_param->gpio_edge_map;
|
||||
type_h = 0x0;
|
||||
|
||||
/* low level or negedge wakeup */
|
||||
if(( type_h & ( 0x01UL << i )) == ( type_l & ( 0x01UL << i )))
|
||||
{
|
||||
if (deep_param->gpio_stay_lo_map & (0x01UL << i)) {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT);
|
||||
} else {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT_PULLUP);
|
||||
}
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
}
|
||||
else /* high level or posedge wakeup */
|
||||
{
|
||||
if (deep_param->gpio_stay_lo_map & (0x01UL << i)) {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT);
|
||||
} else {
|
||||
param = GPIO_CFG_PARAM(i, GMODE_INPUT_PULLDOWN);
|
||||
}
|
||||
sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, ¶m);
|
||||
}
|
||||
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_TYPE, type_l);
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_TYPE_SELECT, type_h);
|
||||
}
|
||||
}
|
||||
|
||||
reg = deep_param->gpio_index_map;
|
||||
REG_WRITE(SCTRL_GPIO_WAKEUP_EN,reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (CFG_SOC_NAME != SOC_BK7231N)
|
||||
REG_WRITE(SCTRL_USB_PLUG_WAKEUP,USB_PLUG_IN_INT_BIT|USB_PLUG_OUT_INT_BIT);
|
||||
if(deep_param->wake_up_way & PS_DEEP_WAKEUP_USB)
|
||||
{
|
||||
REG_WRITE(SCTRL_USB_PLUG_WAKEUP,USB_PLUG_IN_EN_BIT|USB_PLUG_OUT_EN_BIT);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BK_DEEP_SLEEP_DEBUG
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_CONTROL=0x%08X\r\n", REG_READ(SCTRL_CONTROL));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_SLEEP=0x%08X\r\n", REG_READ(SCTRL_SLEEP));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_ROSC_TIMER=0x%08X\r\n", REG_READ(SCTRL_ROSC_TIMER));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_BLOCK_EN_CFG=0x%08X\r\n", REG_READ(SCTRL_BLOCK_EN_CFG));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_ROSC_CAL=0x%08X\r\n", REG_READ(SCTRL_ROSC_CAL));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_BLOCK_EN_MUX=0x%08X\r\n", REG_READ(SCTRL_BLOCK_EN_MUX));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_LOW_PWR_CLK=0x%08X\r\n", REG_READ(SCTRL_LOW_PWR_CLK));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_PWR_MAC_MODEM=0x%08X\r\n", REG_READ(SCTRL_PWR_MAC_MODEM));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_MODEM_CORE_RESET_PHY_HCLK=0x%08X\r\n", REG_READ(SCTRL_MODEM_CORE_RESET_PHY_HCLK));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_CLK_GATING=0x%08X\r\n", REG_READ(SCTRL_CLK_GATING));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_GPIO_WAKEUP_INT_STATUS=0x%08X\r\n", REG_READ(SCTRL_GPIO_WAKEUP_INT_STATUS));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_GPIO_WAKEUP_TYPE=0x%08X\r\n", REG_READ(SCTRL_GPIO_WAKEUP_TYPE));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_GPIO_WAKEUP_EN=0x%08X\r\n", REG_READ(SCTRL_GPIO_WAKEUP_EN));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_GPIO_WAKEUP_INT_STATUS1=0x%08X\r\n", REG_READ(SCTRL_GPIO_WAKEUP_INT_STATUS1));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_GPIO_WAKEUP_TYPE1=0x%08X\r\n", REG_READ(SCTRL_GPIO_WAKEUP_TYPE1));
|
||||
BK_DEEP_SLEEP_PRT("SCTRL_GPIO_WAKEUP_EN1=0x%08X\r\n", REG_READ(SCTRL_GPIO_WAKEUP_EN1));
|
||||
#endif
|
||||
|
||||
/* enter deep_sleep mode */
|
||||
reg = REG_READ(SCTRL_SLEEP);
|
||||
reg &= ~(SLEEP_MODE_MASK << SLEEP_MODE_POSI);
|
||||
reg = reg | SLEEP_MODE_CFG_DEEP_WORD;
|
||||
REG_WRITE(SCTRL_SLEEP, reg);
|
||||
|
||||
delay(5);
|
||||
}
|
||||
@@ -18,7 +18,7 @@ uint32_t wdt_ctrl(uint32_t cmd, void *param);
|
||||
void bk_send_byte(uint8_t uport, uint8_t data);
|
||||
void uart_hw_set_change(uint8_t uport, bk_uart_config_t *uart_config);
|
||||
int uart_rx_callback_set(int uport, uart_callback callback, void *param);
|
||||
void sctrl_enter_rtos_deep_sleep(PS_DEEP_CTRL_PARAM *deep_param);
|
||||
void sctrl_enter_rtos_deep_sleep_fix(PS_DEEP_CTRL_PARAM *deep_param);
|
||||
void ps_delay(volatile UINT16 times);
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@@ -70,8 +70,12 @@ OSStatus __wrap_bk_flash_erase(bk_partition_t partition, uint32_t off_set, uint3
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus
|
||||
__wrap_bk_flash_write(bk_partition_t partition, volatile uint32_t off_set, uint8_t *inBuffer, uint32_t inBufferLength) {
|
||||
OSStatus __wrap_bk_flash_write(
|
||||
bk_partition_t partition,
|
||||
volatile uint32_t off_set,
|
||||
uint8_t *inBuffer,
|
||||
uint32_t inBufferLength
|
||||
) {
|
||||
UINT32 status;
|
||||
DD_HANDLE flash_hdl;
|
||||
uint32_t start_addr;
|
||||
@@ -98,8 +102,12 @@ __wrap_bk_flash_write(bk_partition_t partition, volatile uint32_t off_set, uint8
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus
|
||||
__wrap_bk_flash_read(bk_partition_t partition, volatile uint32_t off_set, uint8_t *outBuffer, uint32_t inBufferLength) {
|
||||
OSStatus __wrap_bk_flash_read(
|
||||
bk_partition_t partition,
|
||||
volatile uint32_t off_set,
|
||||
uint8_t *outBuffer,
|
||||
uint32_t inBufferLength
|
||||
) {
|
||||
UINT32 status;
|
||||
uint32_t start_addr;
|
||||
DD_HANDLE flash_hdl;
|
||||
|
||||
@@ -8,6 +8,8 @@
|
||||
|
||||
using namespace arduino;
|
||||
|
||||
typedef RingBufferN<LT_SERIAL_BUFFER_SIZE> SerialRingBuffer;
|
||||
|
||||
class SerialClass : public HardwareSerial {
|
||||
private:
|
||||
uint32_t port;
|
||||
@@ -18,7 +20,7 @@ class SerialClass : public HardwareSerial {
|
||||
void *data;
|
||||
|
||||
private:
|
||||
RingBuffer *buf;
|
||||
SerialRingBuffer *buf;
|
||||
uint32_t baudrate;
|
||||
uint16_t config;
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@ typedef enum {
|
||||
|
||||
typedef struct {
|
||||
SoftState state;
|
||||
RingBuffer *buf;
|
||||
SerialRingBuffer *buf;
|
||||
uint8_t byte;
|
||||
pin_size_t pin;
|
||||
void *param;
|
||||
|
||||
@@ -97,8 +97,13 @@ class WiFiClass {
|
||||
const uint8_t *bssid = NULL,
|
||||
bool connect = true
|
||||
);
|
||||
WiFiStatus
|
||||
begin(char *ssid, char *passphrase = NULL, int32_t channel = 0, const uint8_t *bssid = NULL, bool connect = true);
|
||||
WiFiStatus begin(
|
||||
char *ssid,
|
||||
char *passphrase = NULL,
|
||||
int32_t channel = 0,
|
||||
const uint8_t *bssid = NULL,
|
||||
bool connect = true
|
||||
);
|
||||
|
||||
bool config(
|
||||
IPAddress localIP,
|
||||
@@ -129,6 +134,8 @@ class WiFiClass {
|
||||
uint8_t subnetCIDR();
|
||||
bool enableIpV6();
|
||||
IPv6Address localIPv6();
|
||||
std::vector<IPv6Address> allLocalIPv6();
|
||||
|
||||
const char *getHostname();
|
||||
bool setHostname(const char *hostname);
|
||||
bool setMacAddress(const uint8_t *mac);
|
||||
@@ -176,7 +183,11 @@ class WiFiClass {
|
||||
|
||||
public: /* WiFiAP.cpp */
|
||||
bool softAP(
|
||||
const char *ssid, const char *passphrase = NULL, int channel = 1, bool ssidHidden = false, int maxClients = 4
|
||||
const char *ssid,
|
||||
const char *passphrase = NULL,
|
||||
int channel = 1,
|
||||
bool ssidHidden = false,
|
||||
int maxClients = 4
|
||||
);
|
||||
bool softAPConfig(IPAddress localIP, IPAddress gateway, IPAddress subnet);
|
||||
bool softAPdisconnect(bool wifiOff = false);
|
||||
|
||||
@@ -44,5 +44,9 @@ __attribute__((weak)) bool WiFiClass::enableIpV6() {
|
||||
}
|
||||
|
||||
__attribute__((weak)) IPv6Address WiFiClass::localIPv6() {
|
||||
return IPv6Address();
|
||||
return {};
|
||||
}
|
||||
|
||||
__attribute__((weak)) std::vector<IPv6Address> WiFiClass::allLocalIPv6() {
|
||||
return {};
|
||||
}
|
||||
|
||||
@@ -3,7 +3,12 @@
|
||||
#include "WiFi.h"
|
||||
|
||||
bool WiFiClass::getNetworkInfo(
|
||||
uint8_t networkItem, String &ssid, WiFiAuthMode &encType, int32_t &rssi, uint8_t *&bssid, int32_t &channel
|
||||
uint8_t networkItem,
|
||||
String &ssid,
|
||||
WiFiAuthMode &encType,
|
||||
int32_t &rssi,
|
||||
uint8_t *&bssid,
|
||||
int32_t &channel
|
||||
) {
|
||||
ssid = SSID(networkItem);
|
||||
encType = encryptionType(networkItem);
|
||||
|
||||
@@ -86,13 +86,21 @@ int MbedTLSClient::connect(const char *host, uint16_t port, int32_t timeout) {
|
||||
}
|
||||
|
||||
int MbedTLSClient::connect(
|
||||
IPAddress ip, uint16_t port, const char *rootCABuf, const char *clientCert, const char *clientKey
|
||||
IPAddress ip,
|
||||
uint16_t port,
|
||||
const char *rootCABuf,
|
||||
const char *clientCert,
|
||||
const char *clientKey
|
||||
) {
|
||||
return connect(ipToString(ip).c_str(), port, 0, rootCABuf, clientCert, clientKey, NULL, NULL) == 0;
|
||||
}
|
||||
|
||||
int MbedTLSClient::connect(
|
||||
const char *host, uint16_t port, const char *rootCABuf, const char *clientCert, const char *clientKey
|
||||
const char *host,
|
||||
uint16_t port,
|
||||
const char *rootCABuf,
|
||||
const char *clientCert,
|
||||
const char *clientKey
|
||||
) {
|
||||
return connect(host, port, 0, rootCABuf, clientCert, clientKey, NULL, NULL) == 0;
|
||||
}
|
||||
|
||||
@@ -26,12 +26,22 @@
|
||||
|
||||
class IWiFiClientSecure {
|
||||
public:
|
||||
virtual int
|
||||
connect(IPAddress ip, uint16_t port, const char *rootCABuf, const char *clientCert, const char *clientKey) = 0;
|
||||
virtual int
|
||||
connect(const char *host, uint16_t port, const char *rootCABuf, const char *clientCert, const char *clientKey) = 0;
|
||||
virtual int connect(IPAddress ip, uint16_t port, const char *pskIdent, const char *psk) = 0;
|
||||
virtual int connect(const char *host, uint16_t port, const char *pskIdent, const char *psk) = 0;
|
||||
virtual int connect(
|
||||
IPAddress ip,
|
||||
uint16_t port,
|
||||
const char *rootCABuf,
|
||||
const char *clientCert,
|
||||
const char *clientKey
|
||||
) = 0;
|
||||
virtual int connect(
|
||||
const char *host,
|
||||
uint16_t port,
|
||||
const char *rootCABuf,
|
||||
const char *clientCert,
|
||||
const char *clientKey
|
||||
) = 0;
|
||||
virtual int connect(IPAddress ip, uint16_t port, const char *pskIdent, const char *psk) = 0;
|
||||
virtual int connect(const char *host, uint16_t port, const char *pskIdent, const char *psk) = 0;
|
||||
|
||||
virtual int lastError(char *buf, const size_t size) = 0;
|
||||
virtual void setInsecure() = 0; // Don't validate the chain, just accept whatever is given. VERY INSECURE!
|
||||
|
||||
@@ -20,11 +20,45 @@ extern "C" {
|
||||
|
||||
#if LWIP_MDNS_RESPONDER
|
||||
|
||||
static std::vector<char *> services_name;
|
||||
static std::vector<char *> services;
|
||||
static std::vector<uint8_t> protos;
|
||||
static std::vector<uint16_t> ports;
|
||||
static std::vector<std::vector<char *>> records;
|
||||
struct CachedService {
|
||||
CachedService(const char *_name, const char *_service, mdns_sd_proto _proto, uint16_t _port)
|
||||
: name(strdup(_name)), service(strdup(_service)), proto(_proto), port(_port) {}
|
||||
|
||||
CachedService(const CachedService &) = delete;
|
||||
CachedService &operator=(const CachedService &) = delete;
|
||||
|
||||
CachedService(CachedService &&other)
|
||||
: name(other.name), service(other.service), proto(other.proto), port(other.port),
|
||||
records(std::move(other.records)) {
|
||||
other.name = nullptr;
|
||||
other.service = nullptr;
|
||||
other.records.clear();
|
||||
}
|
||||
|
||||
~CachedService() {
|
||||
if (name) {
|
||||
free(name);
|
||||
}
|
||||
|
||||
if (service) {
|
||||
free(service);
|
||||
}
|
||||
|
||||
for (auto &str : records) {
|
||||
if (str) {
|
||||
free(str);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
char *name;
|
||||
char *service;
|
||||
mdns_sd_proto proto;
|
||||
uint16_t port;
|
||||
std::vector<char *> records;
|
||||
};
|
||||
|
||||
static std::vector<CachedService> sCachedServices;
|
||||
|
||||
static const char *hostName;
|
||||
#ifdef LWIP_NETIF_EXT_STATUS_CALLBACK
|
||||
@@ -33,46 +67,72 @@ NETIF_DECLARE_EXT_CALLBACK(netif_callback)
|
||||
|
||||
mDNS::mDNS() {}
|
||||
|
||||
mDNS::~mDNS() {}
|
||||
mDNS::~mDNS() {
|
||||
cleanup();
|
||||
}
|
||||
|
||||
void mDNS::cleanup() {
|
||||
sCachedServices.clear();
|
||||
|
||||
free((void *)hostName);
|
||||
hostName = NULL;
|
||||
|
||||
free((void *)instanceName);
|
||||
instanceName = NULL;
|
||||
}
|
||||
|
||||
static void mdnsTxtCallback(struct mdns_service *service, void *userdata) {
|
||||
size_t index = (size_t)userdata;
|
||||
if (index >= records.size())
|
||||
if (index >= sCachedServices.size())
|
||||
return;
|
||||
|
||||
for (const auto record : records[index]) {
|
||||
for (const auto &record : sCachedServices[index].records) {
|
||||
err_t err = mdns_resp_add_service_txtitem(service, record, strlen(record));
|
||||
if (err != ERR_OK)
|
||||
return;
|
||||
if (err != ERR_OK) {
|
||||
LT_DM(MDNS, "Error %d while adding txt record: %s", err, record);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if LWIP_VERSION_SIMPLE < 20200 // TTL removed in LwIP commit 62fb2fd749b (2.2.0 release)
|
||||
static void mdnsStatusCallback(struct netif *netif, uint8_t result) {
|
||||
LT_DM(MDNS, "Status: netif %u, status %u", netif->num, result);
|
||||
}
|
||||
#else
|
||||
static void mdnsStatusCallback(struct netif *netif, uint8_t result, int8_t slot) {
|
||||
LT_DM(MDNS, "Status: netif %u, status %u slot %d", netif->num, result, slot);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef LWIP_NETIF_EXT_STATUS_CALLBACK
|
||||
static void addServices(struct netif *netif) {
|
||||
for (uint8_t i = 0; i < services.size(); i++) {
|
||||
for (uint8_t i = 0; i < sCachedServices.size(); i++) {
|
||||
const auto &cachedService = sCachedServices[i];
|
||||
LT_DM(
|
||||
MDNS,
|
||||
"Add service: netif %u / %s / %s / %u / %u",
|
||||
netif->num,
|
||||
services_name[i],
|
||||
services[i],
|
||||
protos[i],
|
||||
ports[i]
|
||||
cachedService.name,
|
||||
cachedService.service,
|
||||
cachedService.proto,
|
||||
cachedService.port
|
||||
);
|
||||
mdns_resp_add_service(
|
||||
s8_t slot = mdns_resp_add_service(
|
||||
netif,
|
||||
services_name[i],
|
||||
services[i],
|
||||
(mdns_sd_proto)protos[i],
|
||||
ports[i],
|
||||
cachedService.name,
|
||||
cachedService.service,
|
||||
cachedService.proto,
|
||||
cachedService.port,
|
||||
#if LWIP_VERSION_SIMPLE < 20200 // TTL removed in LwIP commit 62fb2fd749b (2.2.0 release)
|
||||
255,
|
||||
#endif
|
||||
mdnsTxtCallback,
|
||||
reinterpret_cast<void *>(i) // index of newly added service
|
||||
);
|
||||
|
||||
if (slot < 0) {
|
||||
LT_DM(MDNS, "mdns_resp_add_service returned error %d", slot);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@@ -85,7 +145,11 @@ static bool enableMDNS(struct netif *netif) {
|
||||
igmp_start(netif);
|
||||
LT_DM(MDNS, "Added IGMP to netif %u", netif->num);
|
||||
}
|
||||
#if LWIP_VERSION_SIMPLE < 20200 // TTL removed in LwIP commit 62fb2fd749b (2.2.0 release)
|
||||
err_t ret = mdns_resp_add_netif(netif, hostName, 255);
|
||||
#else
|
||||
err_t ret = mdns_resp_add_netif(netif, hostName);
|
||||
#endif
|
||||
if (ret == ERR_OK) {
|
||||
LT_DM(MDNS, "mDNS started on netif %u, announcing it to network", netif->num);
|
||||
#if LWIP_VERSION_SIMPLE >= 20100
|
||||
@@ -102,14 +166,17 @@ static bool enableMDNS(struct netif *netif) {
|
||||
}
|
||||
|
||||
#ifdef LWIP_NETIF_EXT_STATUS_CALLBACK
|
||||
static void
|
||||
mdns_netif_ext_status_callback(struct netif *netif, netif_nsc_reason_t reason, const netif_ext_callback_args_t *args) {
|
||||
static void mdns_netif_ext_status_callback(
|
||||
struct netif *netif,
|
||||
netif_nsc_reason_t reason,
|
||||
const netif_ext_callback_args_t *args
|
||||
) {
|
||||
if (reason & LWIP_NSC_NETIF_REMOVED) {
|
||||
LT_DM(MDNS, "Netif removed, stopping mDNS on netif %u", netif->num);
|
||||
mdns_resp_remove_netif(netif);
|
||||
} else if (reason & LWIP_NSC_STATUS_CHANGED) {
|
||||
LT_DM(MDNS, "Netif changed, starting mDNS on netif %u", netif->num);
|
||||
if (enableMDNS(netif) && services.size() > 0) {
|
||||
} else if ((reason & LWIP_NSC_STATUS_CHANGED) || (reason & LWIP_NSC_NETIF_ADDED)) {
|
||||
LT_DM(MDNS, "Netif changed/added, starting mDNS on netif %u", netif->num);
|
||||
if (enableMDNS(netif) && sCachedServices.size() > 0) {
|
||||
LT_DM(MDNS, "Adding services to netif %u", netif->num);
|
||||
addServices(netif);
|
||||
}
|
||||
@@ -136,63 +203,71 @@ bool mDNS::begin(const char *hostname) {
|
||||
}
|
||||
|
||||
void mDNS::end() {
|
||||
#ifdef LWIP_NETIF_EXT_STATUS_CALLBACK
|
||||
netif_remove_ext_callback(&netif_callback);
|
||||
#endif
|
||||
|
||||
struct netif *netif = netif_list;
|
||||
while (netif != NULL) {
|
||||
if (netif_is_up(netif))
|
||||
mdns_resp_remove_netif(netif);
|
||||
netif = netif->next;
|
||||
}
|
||||
|
||||
cleanup();
|
||||
}
|
||||
|
||||
bool mDNS::addServiceImpl(const char *name, const char *service, uint8_t proto, uint16_t port) {
|
||||
bool added = false;
|
||||
struct netif *netif = netif_list;
|
||||
|
||||
std::size_t serviceIndex = sCachedServices.size();
|
||||
// add the service to TXT record arrays
|
||||
sCachedServices.emplace_back(name, service, (mdns_sd_proto)proto, port);
|
||||
|
||||
while (netif != NULL) {
|
||||
if (netif_is_up(netif)) {
|
||||
// register TXT callback;
|
||||
// pass service index as userdata parameter
|
||||
LT_DM(MDNS, "Add service: netif %u / %s / %s / %u / %u", netif->num, name, service, proto, port);
|
||||
mdns_resp_add_service(
|
||||
s8_t slot = mdns_resp_add_service(
|
||||
netif,
|
||||
name,
|
||||
service,
|
||||
(mdns_sd_proto)proto,
|
||||
port,
|
||||
#if LWIP_VERSION_SIMPLE < 20200 // TTL removed in LwIP commit 62fb2fd749b (2.2.0 release)
|
||||
255,
|
||||
#endif
|
||||
mdnsTxtCallback,
|
||||
(void *)services.size() // index of newly added service
|
||||
(void *)serviceIndex // index of newly added service
|
||||
);
|
||||
|
||||
if (slot < 0) {
|
||||
LT_DM(MDNS, "mdns_resp_add_service returned error %d", slot);
|
||||
}
|
||||
|
||||
added = true;
|
||||
}
|
||||
netif = netif->next;
|
||||
}
|
||||
|
||||
if (!added)
|
||||
return false;
|
||||
|
||||
// add the service to TXT record arrays
|
||||
services_name.push_back(strdup(name));
|
||||
services.push_back(strdup(service));
|
||||
protos.push_back(proto);
|
||||
ports.push_back(port);
|
||||
records.emplace_back();
|
||||
|
||||
return true;
|
||||
return added;
|
||||
}
|
||||
|
||||
bool mDNS::addServiceTxtImpl(const char *service, uint8_t proto, const char *item) {
|
||||
int8_t index = -1;
|
||||
for (uint8_t i = 0; i < services.size(); i++) {
|
||||
uint8_t i;
|
||||
for (i = 0; i < sCachedServices.size(); i++) {
|
||||
const auto &cachedService = sCachedServices[i];
|
||||
// find a matching service
|
||||
if (strcmp(services[i], service) == 0 && protos[i] == proto) {
|
||||
index = i;
|
||||
if (strcmp(cachedService.service, service) == 0 && cachedService.proto == proto) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (index == -1)
|
||||
if (i == sCachedServices.size())
|
||||
return false;
|
||||
|
||||
records[index].push_back(strdup(item));
|
||||
sCachedServices[i].records.push_back(strdup(item));
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
@@ -2,14 +2,23 @@
|
||||
|
||||
#include "mDNS.h"
|
||||
|
||||
static char *ensureUnderscore(const char *value) {
|
||||
uint8_t len = strlen(value) + 1;
|
||||
static char *ensureUnderscore(char *value) {
|
||||
if (value[0] == '_') {
|
||||
return value;
|
||||
}
|
||||
size_t len = strlen(value) + 1 + 1; // 1 for underscore, 1 for null-terminator
|
||||
char *result = (char *)malloc(len);
|
||||
result[0] = '_';
|
||||
strcpy(result + 1, value + (value[0] == '_'));
|
||||
strcpy(result + 1, value);
|
||||
return result;
|
||||
}
|
||||
|
||||
static inline void freeIfCopied(const char *original, char *duplicate) {
|
||||
if ((duplicate) && (original != duplicate)) {
|
||||
free(duplicate);
|
||||
}
|
||||
}
|
||||
|
||||
void mDNS::setInstanceName(const char *name) {
|
||||
if (instanceName)
|
||||
free(instanceName);
|
||||
@@ -21,7 +30,7 @@ bool mDNS::addService(char *service, char *proto, uint16_t port) {
|
||||
uint8_t _proto = strncmp(proto + (proto[0] == '_'), "tcp", 3) == 0 ? MDNS_TCP : MDNS_UDP;
|
||||
|
||||
bool result = addServiceImpl(instanceName ? instanceName : "LT mDNS", _service, _proto, port);
|
||||
free(_service);
|
||||
freeIfCopied(service, _service);
|
||||
return result;
|
||||
}
|
||||
|
||||
@@ -34,7 +43,7 @@ bool mDNS::addServiceTxt(char *service, char *proto, char *key, char *value) {
|
||||
sprintf(txt, "%s=%s", key, value);
|
||||
|
||||
bool result = addServiceTxtImpl(_service, _proto, txt);
|
||||
free(_service);
|
||||
freeIfCopied(service, _service);
|
||||
free(txt);
|
||||
return result;
|
||||
}
|
||||
|
||||
@@ -51,6 +51,7 @@ class mDNS {
|
||||
private:
|
||||
bool addServiceImpl(const char *name, const char *service, uint8_t proto, uint16_t port);
|
||||
bool addServiceTxtImpl(const char *service, uint8_t proto, const char *item);
|
||||
void cleanup();
|
||||
|
||||
char *instanceName = NULL;
|
||||
|
||||
|
||||
@@ -321,7 +321,12 @@ bool HTTPClient::begin(String host, uint16_t port, String uri, const char *CAcer
|
||||
}
|
||||
|
||||
bool HTTPClient::begin(
|
||||
String host, uint16_t port, String uri, const char *CAcert, const char *cli_cert, const char *cli_key
|
||||
String host,
|
||||
uint16_t port,
|
||||
String uri,
|
||||
const char *CAcert,
|
||||
const char *cli_cert,
|
||||
const char *cli_key
|
||||
) {
|
||||
if (_client && !_tcpDeprecated) {
|
||||
log_d("mix up of new and deprecated api");
|
||||
|
||||
@@ -81,7 +81,9 @@ class WebServer {
|
||||
|
||||
bool authenticate(const char *username, const char *password);
|
||||
void requestAuthentication(
|
||||
HTTPAuthMethod mode = BASIC_AUTH, const char *realm = NULL, const String &authFailMsg = String("")
|
||||
HTTPAuthMethod mode = BASIC_AUTH,
|
||||
const char *realm = NULL,
|
||||
const String &authFailMsg = String("")
|
||||
);
|
||||
|
||||
typedef std::function<void(void)> THandlerFunction;
|
||||
|
||||
@@ -10,7 +10,10 @@ using namespace mime;
|
||||
class FunctionRequestHandler : public RequestHandler {
|
||||
public:
|
||||
FunctionRequestHandler(
|
||||
WebServer::THandlerFunction fn, WebServer::THandlerFunction ufn, const Uri &uri, HTTPMethod method
|
||||
WebServer::THandlerFunction fn,
|
||||
WebServer::THandlerFunction ufn,
|
||||
const Uri &uri,
|
||||
HTTPMethod method
|
||||
)
|
||||
: _fn(fn), _ufn(ufn), _uri(uri.clone()), _method(method) {
|
||||
_uri->initPathArgs(pathArgs);
|
||||
|
||||
@@ -6,6 +6,8 @@ __attribute__((weak)) void lt_deep_sleep_config_gpio(uint32_t gpio_index_map, bo
|
||||
|
||||
__attribute__((weak)) void lt_deep_sleep_unset_gpio(uint32_t gpio_index_map);
|
||||
|
||||
__attribute__((weak)) void lt_deep_sleep_keep_floating_gpio(uint32_t gpio_index_map, bool on_high);
|
||||
|
||||
__attribute__((weak)) void lt_deep_sleep_config_timer(uint32_t sleep_duration);
|
||||
|
||||
__attribute__((weak)) void lt_deep_sleep_enter();
|
||||
|
||||
@@ -19,6 +19,21 @@ void lt_deep_sleep_config_gpio(uint32_t gpio_index_map, bool on_high);
|
||||
*/
|
||||
void lt_deep_sleep_unset_gpio(uint32_t gpio_index_map);
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO pins to be kept floating
|
||||
*
|
||||
* This prevents pins from being configured as pullup/pulldown, based on
|
||||
* the configured wake-up mode (low/high), upon entering deep sleep.
|
||||
* This is important, as some-low power devices may be unable to ever
|
||||
* overcome the internal pull strength and change the level. One example
|
||||
* of such device is a magnetic door sensor that must be able to wake on
|
||||
* level change in both directions.
|
||||
*
|
||||
* @param gpio_index_map bitMap of the pins to set/unset as floating
|
||||
* @param enabled whether to set pins to floating or roll back to default mode
|
||||
*/
|
||||
void lt_deep_sleep_keep_floating_gpio(uint32_t gpio_index_map, bool enabled);
|
||||
|
||||
/**
|
||||
* @brief Set a sleep timer to wake up the device
|
||||
* @param sleep_duration the time in milliseconds to sleep
|
||||
|
||||
@@ -15,8 +15,15 @@
|
||||
|
||||
// set lwIP debugging options according to LT config
|
||||
#if LT_DEBUG_LWIP
|
||||
// enable main debugging switch
|
||||
#undef LWIP_DEBUG
|
||||
#define LWIP_DEBUG 1
|
||||
// enable all messages
|
||||
#undef LWIP_DBG_MIN_LEVEL
|
||||
#define LWIP_DBG_MIN_LEVEL 0
|
||||
// enable all debugging types
|
||||
#undef LWIP_DBG_TYPES_ON
|
||||
#define LWIP_DBG_TYPES_ON 0xF8
|
||||
// make lwIP use printf() library
|
||||
#include <stdio.h>
|
||||
#undef LWIP_PLATFORM_DIAG
|
||||
|
||||
@@ -77,6 +77,10 @@
|
||||
#define LT_UART_DEFAULT_SERIAL LT_UART_DEFAULT_PORT
|
||||
#endif
|
||||
|
||||
#ifndef LT_SERIAL_BUFFER_SIZE
|
||||
#define LT_SERIAL_BUFFER_SIZE 256
|
||||
#endif
|
||||
|
||||
// Misc options
|
||||
#ifndef LT_USE_TIME
|
||||
#define LT_USE_TIME 0
|
||||
|
||||
@@ -100,31 +100,31 @@ void lt_log_disable();
|
||||
#endif
|
||||
|
||||
// ESP32 compat
|
||||
#define log_printf(...) LT_I(__VA_ARGS__)
|
||||
#define log_v(...) LT_V(__VA_ARGS__)
|
||||
#define log_d(...) LT_D(__VA_ARGS__)
|
||||
#define log_i(...) LT_I(__VA_ARGS__)
|
||||
#define log_w(...) LT_W(__VA_ARGS__)
|
||||
#define log_e(...) LT_E(__VA_ARGS__)
|
||||
#define log_n(...) LT_E(__VA_ARGS__)
|
||||
#define isr_log_v(...) LT_V(__VA_ARGS__)
|
||||
#define isr_log_d(...) LT_D(__VA_ARGS__)
|
||||
#define isr_log_i(...) LT_I(__VA_ARGS__)
|
||||
#define isr_log_w(...) LT_W(__VA_ARGS__)
|
||||
#define isr_log_e(...) LT_E(__VA_ARGS__)
|
||||
#define isr_log_n(...) LT_E(__VA_ARGS__)
|
||||
#define ESP_LOGV(...) LT_V(__VA_ARGS__)
|
||||
#define ESP_LOGD(...) LT_D(__VA_ARGS__)
|
||||
#define ESP_LOGI(...) LT_I(__VA_ARGS__)
|
||||
#define ESP_LOGW(...) LT_W(__VA_ARGS__)
|
||||
#define ESP_LOGE(...) LT_E(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGV(...) LT_V(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGD(...) LT_D(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGI(...) LT_I(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGW(...) LT_W(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGE(...) LT_E(__VA_ARGS__)
|
||||
#define ets_printf(...) LT_I(__VA_ARGS__)
|
||||
#define ETS_PRINTF(...) LT_I(__VA_ARGS__)
|
||||
#define log_printf(...) LT_I(__VA_ARGS__)
|
||||
#define log_v(...) LT_V(__VA_ARGS__)
|
||||
#define log_d(...) LT_D(__VA_ARGS__)
|
||||
#define log_i(...) LT_I(__VA_ARGS__)
|
||||
#define log_w(...) LT_W(__VA_ARGS__)
|
||||
#define log_e(...) LT_E(__VA_ARGS__)
|
||||
#define log_n(...) LT_E(__VA_ARGS__)
|
||||
#define isr_log_v(...) LT_V(__VA_ARGS__)
|
||||
#define isr_log_d(...) LT_D(__VA_ARGS__)
|
||||
#define isr_log_i(...) LT_I(__VA_ARGS__)
|
||||
#define isr_log_w(...) LT_W(__VA_ARGS__)
|
||||
#define isr_log_e(...) LT_E(__VA_ARGS__)
|
||||
#define isr_log_n(...) LT_E(__VA_ARGS__)
|
||||
#define ESP_LOGV(tag, ...) LT_V(__VA_ARGS__)
|
||||
#define ESP_LOGD(tag, ...) LT_D(__VA_ARGS__)
|
||||
#define ESP_LOGI(tag, ...) LT_I(__VA_ARGS__)
|
||||
#define ESP_LOGW(tag, ...) LT_W(__VA_ARGS__)
|
||||
#define ESP_LOGE(tag, ...) LT_E(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGV(tag, ...) LT_V(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGD(tag, ...) LT_D(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGI(tag, ...) LT_I(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGW(tag, ...) LT_W(__VA_ARGS__)
|
||||
#define ESP_EARLY_LOGE(tag, ...) LT_E(__VA_ARGS__)
|
||||
#define ets_printf(...) LT_I(__VA_ARGS__)
|
||||
#define ETS_PRINTF(...) LT_I(__VA_ARGS__)
|
||||
|
||||
#define LT_RET(ret) \
|
||||
LT_E("ret=%d", ret); \
|
||||
|
||||
@@ -63,8 +63,8 @@ void SoftwareSerial::begin(unsigned long baudrate, uint16_t config) {
|
||||
pinMode(data.tx.pin, OUTPUT);
|
||||
digitalWrite(data.tx.pin, HIGH);
|
||||
|
||||
data.rx.buf = new RingBuffer();
|
||||
data.tx.buf = new RingBuffer();
|
||||
data.rx.buf = new SerialRingBuffer();
|
||||
data.tx.buf = new SerialRingBuffer();
|
||||
data.rx.state = SS_IDLE;
|
||||
data.tx.state = SS_IDLE;
|
||||
|
||||
|
||||
@@ -2,8 +2,13 @@
|
||||
|
||||
#include "WiFiPrivate.h"
|
||||
|
||||
WiFiStatus
|
||||
WiFiClass::begin(const char *ssid, const char *passphrase, int32_t channel, const uint8_t *bssid, bool connect) {
|
||||
WiFiStatus WiFiClass::begin(
|
||||
const char *ssid,
|
||||
const char *passphrase,
|
||||
int32_t channel,
|
||||
const uint8_t *bssid,
|
||||
bool connect
|
||||
) {
|
||||
if (!enableSTA(true))
|
||||
return WL_CONNECT_FAILED;
|
||||
if (!validate(ssid, passphrase))
|
||||
|
||||
@@ -61,6 +61,9 @@ void attachInterruptParam(pin_size_t interruptNumber, voidFuncPtrParam callback,
|
||||
case CHANGE:
|
||||
#if LT_RTL8720C
|
||||
event = IRQ_FALL_RISE;
|
||||
// Prevents Change interrupt errors on RTL8710B chips.
|
||||
#elif LT_RTL8710B
|
||||
event = IRQ_RISE;
|
||||
#else
|
||||
LT_W("CHANGE interrupts not supported");
|
||||
#endif
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
typedef struct {
|
||||
UART_TypeDef *uart;
|
||||
IRQn irq;
|
||||
RingBuffer buf;
|
||||
SerialRingBuffer buf;
|
||||
} SerialData;
|
||||
|
||||
#define DATA ((SerialData *)data)
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
|
||||
typedef struct {
|
||||
hal_uart_adapter_t *uart;
|
||||
RingBuffer buf;
|
||||
SerialRingBuffer buf;
|
||||
} SerialData;
|
||||
|
||||
#define DATA ((SerialData *)data)
|
||||
|
||||
@@ -7,4 +7,11 @@
|
||||
#define sys_now sys_now_dummy
|
||||
#include_next "lwipopts.h"
|
||||
#undef sys_now
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
extern unsigned long sys_now(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -13,7 +13,10 @@ custom_fw_version = 1.2.0
|
||||
|
||||
# custom build options (#defines, NOT compiler flags)
|
||||
custom_options.lwip =
|
||||
LWIP_IPV4 = 1
|
||||
# make sure to enable LT_DEBUG_LWIP as well
|
||||
NETIF_DEBUG = 0x80
|
||||
IP_DEBUG = 0x80
|
||||
TCP_DEBUG = 0x80
|
||||
custom_options.freertos =
|
||||
configUSE_TICK_HOOK = 1
|
||||
|
||||
@@ -82,7 +85,7 @@ To see debug messages from i.e. OTA, loglevel must also be changed.
|
||||
- `LT_DEBUG_OTA` (1) - OTA updates (`Update` library)
|
||||
- `LT_DEBUG_FDB` (0) - FlashDB debugging (macros within the library)
|
||||
- `LT_DEBUG_MDNS` (0) - mDNS client library
|
||||
- `LT_DEBUG_LWIP` (0) - enables `LWIP_DEBUG`, provides `LWIP_PLATFORM_DIAG`; per-module options (i.e. `TCP_DEBUG`) are off by default and need to be enabled separately
|
||||
- `LT_DEBUG_LWIP` (0) - enables `LWIP_DEBUG`, provides `LWIP_PLATFORM_DIAG`; per-module options (i.e. `TCP_DEBUG`) are off by default and need to be enabled separately - see example in `Project options` above
|
||||
- `LT_DEBUG_LWIP_ASSERT` (0) - enables assertions within lwIP (doesn't need `LT_DEBUG_LWIP`)
|
||||
|
||||
!!! tip
|
||||
|
||||
@@ -90,9 +90,10 @@
|
||||
"+<src/api/*.c>",
|
||||
"+<src/core/*.c>",
|
||||
"+<src/core/ipv4/*.c>",
|
||||
"+<src/core/ipv6/*.c>",
|
||||
"+<src/netif/ethernet.c>",
|
||||
"+<src/netif/etharp.c>",
|
||||
"+<src/apps/mdns/mdns.c>",
|
||||
"+<src/apps/mdns/*.c>",
|
||||
"+<src/apps/sntp/sntp.c>",
|
||||
"+<port/realtek/freertos/ethernetif.c>",
|
||||
"+<port/realtek/freertos/sys_arch.c>"
|
||||
@@ -110,9 +111,10 @@
|
||||
"+<src/api/*.c>",
|
||||
"+<src/core/*.c>",
|
||||
"+<src/core/ipv4/*.c>",
|
||||
"+<src/core/ipv6/*.c>",
|
||||
"+<src/netif/ethernet.c>",
|
||||
"+<src/netif/etharp.c>",
|
||||
"+<src/apps/mdns/mdns.c>",
|
||||
"+<src/apps/mdns/*.c>",
|
||||
"+<src/apps/sntp/sntp.c>",
|
||||
"+<port/*.c>"
|
||||
],
|
||||
@@ -128,9 +130,10 @@
|
||||
"+<src/api/*.c>",
|
||||
"+<src/core/*.c>",
|
||||
"+<src/core/ipv4/*.c>",
|
||||
"+<src/core/ipv6/*.c>",
|
||||
"+<src/netif/ethernet.c>",
|
||||
"+<src/netif/etharp.c>",
|
||||
"+<src/apps/mdns/mdns.c>",
|
||||
"+<src/apps/mdns/*.c>",
|
||||
"+<src/apps/sntp/sntp.c>",
|
||||
"+<port/realtek/freertos/ethernetif.c>",
|
||||
"+<port/realtek/freertos/sys_arch.c>"
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
"type": "git",
|
||||
"url": "https://github.com/libretiny-eu/libretiny.git"
|
||||
},
|
||||
"version": "1.5.1",
|
||||
"version": "1.8.0",
|
||||
"frameworks": {
|
||||
"base": {
|
||||
"title": "Base Framework (SDK only)",
|
||||
@@ -67,7 +67,8 @@
|
||||
"2.0.2": "2.0.2-bdk",
|
||||
"2.1.0": "2.1.0-bdk",
|
||||
"2.1.3": "2.1.3-bdk",
|
||||
"default": "2.1.3-bdk"
|
||||
"2.2.0": "2.2.0-bdk",
|
||||
"default": "2.2.0-bdk"
|
||||
}
|
||||
}
|
||||
},
|
||||
|
||||
Reference in New Issue
Block a user