Updates

2026-02-23 09:58:19 -07:00 · 2022-11-15 20:28:24 -05:00
parent 03c7e4e699
commit eb0429fddb
13 changed files with 2 additions and 15 deletions
--- a/src/chipset/intel_815ep.c
+++ b/src/chipset/intel_815ep.c
@@ -15,7 +15,6 @@
 *
 *          Copyright 2022 Tiseno100.
 *          Copyright 2022 Jasmine Iwanek.
- *
 */

 #include <stdarg.h>
--- a/src/chipset/intel_ich2.c
+++ b/src/chipset/intel_ich2.c
@@ -15,7 +15,6 @@
 *
 *          Copyright 2022 Tiseno100.
 *          Copyright 2022 Jasmine Iwanek.
- *
 */

 #include <stdarg.h>
@@ -147,8 +146,7 @@ intel_ich2_pirq_update(int reset, int addr, uint8_t val)
    if (((val & 0x80) != 0x80) && !reset) {                                            /* 86Box doesn't have an APIC yet.                          */
        intel_ich2_log("Intel ICH2 LPC: Update PIRQ %c to IRQ %d\n", '@' + pirq, val); /* Under normal circumstances on an APIC enabled motherboard*/
        pci_set_irq_routing(pirq, intel_ich2_pirq_table(val));                         /* this remains disabled and the IRQ are handed by the APIC */
-    }                                                                                  /* itself.                                                  */
-    else if (reset)
+    } else if (reset)                                                                  /* itself.                                                  */
        for (int i = 1; i <= 8; i++)
            pci_set_irq_routing(i, PCI_IRQ_DISABLED);
 }
--- a/src/device/hwm_nsc366.c
+++ b/src/device/hwm_nsc366.c
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 /* The conversion algorithms were taken by the pc87360.c driver of the Linux kernel.
--- a/src/device/intel_ich2_gpio.c
+++ b/src/device/intel_ich2_gpio.c
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #include <stdarg.h>
--- a/src/device/intel_ich2_trap.c
+++ b/src/device/intel_ich2_trap.c
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #include <stdarg.h>
--- a/src/include/86box/acpi.h
+++ b/src/include/86box/acpi.h
@@ -21,7 +21,7 @@
 extern "C" {
 #endif

-#include <86box/tco.h> /* TCO Header. Needed for the Intel ICH chipsets. */
+#include <86box/tco.h>

 #define ACPI_TIMER_FREQ 3579545
 #define PM_FREQ         ACPI_TIMER_FREQ
--- a/src/include/86box/intel_ich2_gpio.h
+++ b/src/include/86box/intel_ich2_gpio.h
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #ifndef EMU_INTEL_ICH2_GPIO_H
--- a/src/include/86box/intel_ich2_trap.h
+++ b/src/include/86box/intel_ich2_trap.h
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #ifndef EMU_INTEL_ICH2_TRAP_H
--- a/src/include/86box/nsc366.h
+++ b/src/include/86box/nsc366.h
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #ifndef EMU_NSC_366_H
--- a/src/include/86box/tco.h
+++ b/src/include/86box/tco.h
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #ifndef EMU_TCO_H
--- a/src/mem/815ep_spd_hack.c
+++ b/src/mem/815ep_spd_hack.c
@@ -13,7 +13,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 /* This is a hack because the 86Box SPD calculation algorithm is not made for the 815EP banking.
--- a/src/mem/sst_flash.c
+++ b/src/mem/sst_flash.c
@@ -19,7 +19,6 @@
 *          Copyright 2020 Melissa Goad.
 *          Copyright 2022 Jasmine Iwanek.
 */
-
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
--- a/src/sio/sio_nsc366.c
+++ b/src/sio/sio_nsc366.c
@@ -14,7 +14,6 @@
 * Authors: Tiseno100,
 *
 *          Copyright 2022 Tiseno100.
- *
 */

 #include <stdarg.h>